/* This file is autogenerated by scripts/decodetree.py.  */

typedef struct {
    int lsb;
    int msb;
    int rd;
    int rn;
} arg_bfi;

typedef struct {
    int lsb;
    int rd;
    int rn;
    int widthm1;
} arg_bfx;

typedef struct {
    int rn;
    int rt;
    int rt2;
} arg_disas_a3226;

typedef struct {
#ifdef _MSC_VER
    int dummy;
#endif
} arg_empty;

typedef struct {
    int imm;
} arg_i;

typedef struct {
    int imm;
    int rn;
    int rt;
    int rt2;
} arg_ldrex;

typedef struct {
    int b;
    int i;
    int list;
    int rn;
    int u;
    int w;
} arg_ldst_block;

typedef struct {
    int imm;
    int p;
    int rn;
    int rt;
    int u;
    int w;
} arg_ldst_ri;

typedef struct {
    int p;
    int rm;
    int rn;
    int rt;
    int shimm;
    int shtype;
    int u;
    int w;
} arg_ldst_rr;

typedef struct {
    int r;
    int rd;
    int sysm;
} arg_mrs_bank;

typedef struct {
    int r;
    int rd;
} arg_mrs_reg;

typedef struct {
    int r;
    int rn;
    int sysm;
} arg_msr_bank;

typedef struct {
    int imm;
    int mask;
    int r;
    int rot;
} arg_msr_i;

typedef struct {
    int mask;
    int r;
    int rn;
} arg_msr_reg;

typedef struct {
    int imm;
    int rd;
    int rm;
    int rn;
    int tb;
} arg_pkh;

typedef struct {
    int rm;
} arg_r;

typedef struct {
    int imm;
    int rd;
} arg_ri;

typedef struct {
    int rd;
    int rm;
} arg_rr;

typedef struct {
    int rd;
    int rm;
    int rn;
} arg_rrr;

typedef struct {
    int rd;
    int rm;
    int rn;
    int rot;
} arg_rrr_rot;

typedef struct {
    int ra;
    int rd;
    int rm;
    int rn;
} arg_rrrr;

typedef struct {
    int imm;
    int rd;
    int rn;
    int rot;
    int s;
} arg_s_rri_rot;

typedef struct {
    int rd;
    int rm;
    int rn;
    int s;
    int shim;
    int shty;
} arg_s_rrr_shi;

typedef struct {
    int rd;
    int rm;
    int rn;
    int rs;
    int s;
    int shty;
} arg_s_rrr_shr;

typedef struct {
    int ra;
    int rd;
    int rm;
    int rn;
    int s;
} arg_s_rrrr;

typedef struct {
    int imm;
    int rd;
    int rn;
    int satimm;
    int sh;
} arg_sat;

typedef struct {
    int imm;
    int rd;
    int rn;
    int rt;
    int rt2;
} arg_strex;

typedef arg_s_rrr_shi arg_AND_rrri;
static bool trans_AND_rrri(DisasContext *ctx, arg_AND_rrri *a);
typedef arg_s_rrr_shi arg_EOR_rrri;
static bool trans_EOR_rrri(DisasContext *ctx, arg_EOR_rrri *a);
typedef arg_s_rrr_shi arg_SUB_rrri;
static bool trans_SUB_rrri(DisasContext *ctx, arg_SUB_rrri *a);
typedef arg_s_rrr_shi arg_RSB_rrri;
static bool trans_RSB_rrri(DisasContext *ctx, arg_RSB_rrri *a);
typedef arg_s_rrr_shi arg_ADD_rrri;
static bool trans_ADD_rrri(DisasContext *ctx, arg_ADD_rrri *a);
typedef arg_s_rrr_shi arg_ADC_rrri;
static bool trans_ADC_rrri(DisasContext *ctx, arg_ADC_rrri *a);
typedef arg_s_rrr_shi arg_SBC_rrri;
static bool trans_SBC_rrri(DisasContext *ctx, arg_SBC_rrri *a);
typedef arg_s_rrr_shi arg_RSC_rrri;
static bool trans_RSC_rrri(DisasContext *ctx, arg_RSC_rrri *a);
typedef arg_s_rrr_shi arg_TST_xrri;
static bool trans_TST_xrri(DisasContext *ctx, arg_TST_xrri *a);
typedef arg_s_rrr_shi arg_TEQ_xrri;
static bool trans_TEQ_xrri(DisasContext *ctx, arg_TEQ_xrri *a);
typedef arg_s_rrr_shi arg_CMP_xrri;
static bool trans_CMP_xrri(DisasContext *ctx, arg_CMP_xrri *a);
typedef arg_s_rrr_shi arg_CMN_xrri;
static bool trans_CMN_xrri(DisasContext *ctx, arg_CMN_xrri *a);
typedef arg_s_rrr_shi arg_ORR_rrri;
static bool trans_ORR_rrri(DisasContext *ctx, arg_ORR_rrri *a);
typedef arg_s_rrr_shi arg_MOV_rxri;
static bool trans_MOV_rxri(DisasContext *ctx, arg_MOV_rxri *a);
typedef arg_s_rrr_shi arg_BIC_rrri;
static bool trans_BIC_rrri(DisasContext *ctx, arg_BIC_rrri *a);
typedef arg_s_rrr_shi arg_MVN_rxri;
static bool trans_MVN_rxri(DisasContext *ctx, arg_MVN_rxri *a);
typedef arg_ri arg_MOVW;
static bool trans_MOVW(DisasContext *ctx, arg_MOVW *a);
typedef arg_ri arg_MOVT;
static bool trans_MOVT(DisasContext *ctx, arg_MOVT *a);
typedef arg_s_rrr_shr arg_AND_rrrr;
static bool trans_AND_rrrr(DisasContext *ctx, arg_AND_rrrr *a);
typedef arg_s_rrr_shr arg_EOR_rrrr;
static bool trans_EOR_rrrr(DisasContext *ctx, arg_EOR_rrrr *a);
typedef arg_s_rrr_shr arg_SUB_rrrr;
static bool trans_SUB_rrrr(DisasContext *ctx, arg_SUB_rrrr *a);
typedef arg_s_rrr_shr arg_RSB_rrrr;
static bool trans_RSB_rrrr(DisasContext *ctx, arg_RSB_rrrr *a);
typedef arg_s_rrr_shr arg_ADD_rrrr;
static bool trans_ADD_rrrr(DisasContext *ctx, arg_ADD_rrrr *a);
typedef arg_s_rrr_shr arg_ADC_rrrr;
static bool trans_ADC_rrrr(DisasContext *ctx, arg_ADC_rrrr *a);
typedef arg_s_rrr_shr arg_SBC_rrrr;
static bool trans_SBC_rrrr(DisasContext *ctx, arg_SBC_rrrr *a);
typedef arg_s_rrr_shr arg_RSC_rrrr;
static bool trans_RSC_rrrr(DisasContext *ctx, arg_RSC_rrrr *a);
typedef arg_s_rrr_shr arg_TST_xrrr;
static bool trans_TST_xrrr(DisasContext *ctx, arg_TST_xrrr *a);
typedef arg_s_rrr_shr arg_TEQ_xrrr;
static bool trans_TEQ_xrrr(DisasContext *ctx, arg_TEQ_xrrr *a);
typedef arg_s_rrr_shr arg_CMP_xrrr;
static bool trans_CMP_xrrr(DisasContext *ctx, arg_CMP_xrrr *a);
typedef arg_s_rrr_shr arg_CMN_xrrr;
static bool trans_CMN_xrrr(DisasContext *ctx, arg_CMN_xrrr *a);
typedef arg_s_rrr_shr arg_ORR_rrrr;
static bool trans_ORR_rrrr(DisasContext *ctx, arg_ORR_rrrr *a);
typedef arg_s_rrr_shr arg_MOV_rxrr;
static bool trans_MOV_rxrr(DisasContext *ctx, arg_MOV_rxrr *a);
typedef arg_s_rrr_shr arg_BIC_rrrr;
static bool trans_BIC_rrrr(DisasContext *ctx, arg_BIC_rrrr *a);
typedef arg_s_rrr_shr arg_MVN_rxrr;
static bool trans_MVN_rxrr(DisasContext *ctx, arg_MVN_rxrr *a);
typedef arg_s_rri_rot arg_AND_rri;
static bool trans_AND_rri(DisasContext *ctx, arg_AND_rri *a);
typedef arg_s_rri_rot arg_EOR_rri;
static bool trans_EOR_rri(DisasContext *ctx, arg_EOR_rri *a);
typedef arg_s_rri_rot arg_SUB_rri;
static bool trans_SUB_rri(DisasContext *ctx, arg_SUB_rri *a);
typedef arg_s_rri_rot arg_RSB_rri;
static bool trans_RSB_rri(DisasContext *ctx, arg_RSB_rri *a);
typedef arg_s_rri_rot arg_ADD_rri;
static bool trans_ADD_rri(DisasContext *ctx, arg_ADD_rri *a);
typedef arg_s_rri_rot arg_ADC_rri;
static bool trans_ADC_rri(DisasContext *ctx, arg_ADC_rri *a);
typedef arg_s_rri_rot arg_SBC_rri;
static bool trans_SBC_rri(DisasContext *ctx, arg_SBC_rri *a);
typedef arg_s_rri_rot arg_RSC_rri;
static bool trans_RSC_rri(DisasContext *ctx, arg_RSC_rri *a);
typedef arg_s_rri_rot arg_TST_xri;
static bool trans_TST_xri(DisasContext *ctx, arg_TST_xri *a);
typedef arg_s_rri_rot arg_TEQ_xri;
static bool trans_TEQ_xri(DisasContext *ctx, arg_TEQ_xri *a);
typedef arg_s_rri_rot arg_CMP_xri;
static bool trans_CMP_xri(DisasContext *ctx, arg_CMP_xri *a);
typedef arg_s_rri_rot arg_CMN_xri;
static bool trans_CMN_xri(DisasContext *ctx, arg_CMN_xri *a);
typedef arg_s_rri_rot arg_ORR_rri;
static bool trans_ORR_rri(DisasContext *ctx, arg_ORR_rri *a);
typedef arg_s_rri_rot arg_MOV_rxi;
static bool trans_MOV_rxi(DisasContext *ctx, arg_MOV_rxi *a);
typedef arg_s_rri_rot arg_BIC_rri;
static bool trans_BIC_rri(DisasContext *ctx, arg_BIC_rri *a);
typedef arg_s_rri_rot arg_MVN_rxi;
static bool trans_MVN_rxi(DisasContext *ctx, arg_MVN_rxi *a);
typedef arg_s_rrrr arg_MUL;
static bool trans_MUL(DisasContext *ctx, arg_MUL *a);
typedef arg_s_rrrr arg_MLA;
static bool trans_MLA(DisasContext *ctx, arg_MLA *a);
typedef arg_rrrr arg_UMAAL;
static bool trans_UMAAL(DisasContext *ctx, arg_UMAAL *a);
typedef arg_rrrr arg_MLS;
static bool trans_MLS(DisasContext *ctx, arg_MLS *a);
typedef arg_s_rrrr arg_UMULL;
static bool trans_UMULL(DisasContext *ctx, arg_UMULL *a);
typedef arg_s_rrrr arg_UMLAL;
static bool trans_UMLAL(DisasContext *ctx, arg_UMLAL *a);
typedef arg_s_rrrr arg_SMULL;
static bool trans_SMULL(DisasContext *ctx, arg_SMULL *a);
typedef arg_s_rrrr arg_SMLAL;
static bool trans_SMLAL(DisasContext *ctx, arg_SMLAL *a);
typedef arg_rrr arg_QADD;
static bool trans_QADD(DisasContext *ctx, arg_QADD *a);
typedef arg_rrr arg_QSUB;
static bool trans_QSUB(DisasContext *ctx, arg_QSUB *a);
typedef arg_rrr arg_QDADD;
static bool trans_QDADD(DisasContext *ctx, arg_QDADD *a);
typedef arg_rrr arg_QDSUB;
static bool trans_QDSUB(DisasContext *ctx, arg_QDSUB *a);
typedef arg_rrrr arg_SMLABB;
static bool trans_SMLABB(DisasContext *ctx, arg_SMLABB *a);
typedef arg_rrrr arg_SMLABT;
static bool trans_SMLABT(DisasContext *ctx, arg_SMLABT *a);
typedef arg_rrrr arg_SMLATB;
static bool trans_SMLATB(DisasContext *ctx, arg_SMLATB *a);
typedef arg_rrrr arg_SMLATT;
static bool trans_SMLATT(DisasContext *ctx, arg_SMLATT *a);
typedef arg_rrrr arg_SMLAWB;
static bool trans_SMLAWB(DisasContext *ctx, arg_SMLAWB *a);
typedef arg_rrrr arg_SMULWB;
static bool trans_SMULWB(DisasContext *ctx, arg_SMULWB *a);
typedef arg_rrrr arg_SMLAWT;
static bool trans_SMLAWT(DisasContext *ctx, arg_SMLAWT *a);
typedef arg_rrrr arg_SMULWT;
static bool trans_SMULWT(DisasContext *ctx, arg_SMULWT *a);
typedef arg_rrrr arg_SMLALBB;
static bool trans_SMLALBB(DisasContext *ctx, arg_SMLALBB *a);
typedef arg_rrrr arg_SMLALBT;
static bool trans_SMLALBT(DisasContext *ctx, arg_SMLALBT *a);
typedef arg_rrrr arg_SMLALTB;
static bool trans_SMLALTB(DisasContext *ctx, arg_SMLALTB *a);
typedef arg_rrrr arg_SMLALTT;
static bool trans_SMLALTT(DisasContext *ctx, arg_SMLALTT *a);
typedef arg_rrrr arg_SMULBB;
static bool trans_SMULBB(DisasContext *ctx, arg_SMULBB *a);
typedef arg_rrrr arg_SMULBT;
static bool trans_SMULBT(DisasContext *ctx, arg_SMULBT *a);
typedef arg_rrrr arg_SMULTB;
static bool trans_SMULTB(DisasContext *ctx, arg_SMULTB *a);
typedef arg_rrrr arg_SMULTT;
static bool trans_SMULTT(DisasContext *ctx, arg_SMULTT *a);
typedef arg_empty arg_YIELD;
static bool trans_YIELD(DisasContext *ctx, arg_YIELD *a);
typedef arg_empty arg_WFE;
static bool trans_WFE(DisasContext *ctx, arg_WFE *a);
typedef arg_empty arg_WFI;
static bool trans_WFI(DisasContext *ctx, arg_WFI *a);
typedef arg_empty arg_NOP;
static bool trans_NOP(DisasContext *ctx, arg_NOP *a);
typedef arg_msr_i arg_MSR_imm;
static bool trans_MSR_imm(DisasContext *ctx, arg_MSR_imm *a);
typedef arg_rrr arg_CRC32B;
static bool trans_CRC32B(DisasContext *ctx, arg_CRC32B *a);
typedef arg_rrr arg_CRC32H;
static bool trans_CRC32H(DisasContext *ctx, arg_CRC32H *a);
typedef arg_rrr arg_CRC32W;
static bool trans_CRC32W(DisasContext *ctx, arg_CRC32W *a);
typedef arg_rrr arg_CRC32CB;
static bool trans_CRC32CB(DisasContext *ctx, arg_CRC32CB *a);
typedef arg_rrr arg_CRC32CH;
static bool trans_CRC32CH(DisasContext *ctx, arg_CRC32CH *a);
typedef arg_rrr arg_CRC32CW;
static bool trans_CRC32CW(DisasContext *ctx, arg_CRC32CW *a);
typedef arg_mrs_bank arg_MRS_bank;
static bool trans_MRS_bank(DisasContext *ctx, arg_MRS_bank *a);
typedef arg_msr_bank arg_MSR_bank;
static bool trans_MSR_bank(DisasContext *ctx, arg_MSR_bank *a);
typedef arg_mrs_reg arg_MRS_reg;
static bool trans_MRS_reg(DisasContext *ctx, arg_MRS_reg *a);
typedef arg_msr_reg arg_MSR_reg;
static bool trans_MSR_reg(DisasContext *ctx, arg_MSR_reg *a);
typedef arg_r arg_BX;
static bool trans_BX(DisasContext *ctx, arg_BX *a);
typedef arg_r arg_BXJ;
static bool trans_BXJ(DisasContext *ctx, arg_BXJ *a);
typedef arg_r arg_BLX_r;
static bool trans_BLX_r(DisasContext *ctx, arg_BLX_r *a);
typedef arg_rr arg_CLZ;
static bool trans_CLZ(DisasContext *ctx, arg_CLZ *a);
typedef arg_empty arg_ERET;
static bool trans_ERET(DisasContext *ctx, arg_ERET *a);
typedef arg_i arg_HLT;
static bool trans_HLT(DisasContext *ctx, arg_HLT *a);
typedef arg_i arg_BKPT;
static bool trans_BKPT(DisasContext *ctx, arg_BKPT *a);
typedef arg_i arg_HVC;
static bool trans_HVC(DisasContext *ctx, arg_HVC *a);
typedef arg_i arg_SMC;
static bool trans_SMC(DisasContext *ctx, arg_SMC *a);
typedef arg_ldst_rr arg_STRH_rr;
static bool trans_STRH_rr(DisasContext *ctx, arg_STRH_rr *a);
typedef arg_ldst_rr arg_LDRD_rr;
static bool trans_LDRD_rr(DisasContext *ctx, arg_LDRD_rr *a);
typedef arg_ldst_rr arg_STRD_rr;
static bool trans_STRD_rr(DisasContext *ctx, arg_STRD_rr *a);
typedef arg_ldst_rr arg_LDRH_rr;
static bool trans_LDRH_rr(DisasContext *ctx, arg_LDRH_rr *a);
typedef arg_ldst_rr arg_LDRSB_rr;
static bool trans_LDRSB_rr(DisasContext *ctx, arg_LDRSB_rr *a);
typedef arg_ldst_rr arg_LDRSH_rr;
static bool trans_LDRSH_rr(DisasContext *ctx, arg_LDRSH_rr *a);
typedef arg_ldst_rr arg_STRHT_rr;
static bool trans_STRHT_rr(DisasContext *ctx, arg_STRHT_rr *a);
typedef arg_ldst_rr arg_LDRHT_rr;
static bool trans_LDRHT_rr(DisasContext *ctx, arg_LDRHT_rr *a);
typedef arg_ldst_rr arg_LDRSBT_rr;
static bool trans_LDRSBT_rr(DisasContext *ctx, arg_LDRSBT_rr *a);
typedef arg_ldst_rr arg_LDRSHT_rr;
static bool trans_LDRSHT_rr(DisasContext *ctx, arg_LDRSHT_rr *a);
typedef arg_ldst_rr arg_STR_rr;
static bool trans_STR_rr(DisasContext *ctx, arg_STR_rr *a);
typedef arg_ldst_rr arg_STRB_rr;
static bool trans_STRB_rr(DisasContext *ctx, arg_STRB_rr *a);
typedef arg_ldst_rr arg_LDR_rr;
static bool trans_LDR_rr(DisasContext *ctx, arg_LDR_rr *a);
typedef arg_ldst_rr arg_LDRB_rr;
static bool trans_LDRB_rr(DisasContext *ctx, arg_LDRB_rr *a);
typedef arg_ldst_rr arg_STRT_rr;
static bool trans_STRT_rr(DisasContext *ctx, arg_STRT_rr *a);
typedef arg_ldst_rr arg_STRBT_rr;
static bool trans_STRBT_rr(DisasContext *ctx, arg_STRBT_rr *a);
typedef arg_ldst_rr arg_LDRT_rr;
static bool trans_LDRT_rr(DisasContext *ctx, arg_LDRT_rr *a);
typedef arg_ldst_rr arg_LDRBT_rr;
static bool trans_LDRBT_rr(DisasContext *ctx, arg_LDRBT_rr *a);
typedef arg_ldst_ri arg_STRH_ri;
static bool trans_STRH_ri(DisasContext *ctx, arg_STRH_ri *a);
typedef arg_ldst_ri arg_LDRD_ri_a32;
static bool trans_LDRD_ri_a32(DisasContext *ctx, arg_LDRD_ri_a32 *a);
typedef arg_ldst_ri arg_STRD_ri_a32;
static bool trans_STRD_ri_a32(DisasContext *ctx, arg_STRD_ri_a32 *a);
typedef arg_ldst_ri arg_LDRH_ri;
static bool trans_LDRH_ri(DisasContext *ctx, arg_LDRH_ri *a);
typedef arg_ldst_ri arg_LDRSB_ri;
static bool trans_LDRSB_ri(DisasContext *ctx, arg_LDRSB_ri *a);
typedef arg_ldst_ri arg_LDRSH_ri;
static bool trans_LDRSH_ri(DisasContext *ctx, arg_LDRSH_ri *a);
typedef arg_ldst_ri arg_STRHT_ri;
static bool trans_STRHT_ri(DisasContext *ctx, arg_STRHT_ri *a);
typedef arg_ldst_ri arg_LDRHT_ri;
static bool trans_LDRHT_ri(DisasContext *ctx, arg_LDRHT_ri *a);
typedef arg_ldst_ri arg_LDRSBT_ri;
static bool trans_LDRSBT_ri(DisasContext *ctx, arg_LDRSBT_ri *a);
typedef arg_ldst_ri arg_LDRSHT_ri;
static bool trans_LDRSHT_ri(DisasContext *ctx, arg_LDRSHT_ri *a);
typedef arg_ldst_ri arg_STR_ri;
static bool trans_STR_ri(DisasContext *ctx, arg_STR_ri *a);
typedef arg_ldst_ri arg_STRB_ri;
static bool trans_STRB_ri(DisasContext *ctx, arg_STRB_ri *a);
typedef arg_ldst_ri arg_LDR_ri;
static bool trans_LDR_ri(DisasContext *ctx, arg_LDR_ri *a);
typedef arg_ldst_ri arg_LDRB_ri;
static bool trans_LDRB_ri(DisasContext *ctx, arg_LDRB_ri *a);
typedef arg_ldst_ri arg_STRT_ri;
static bool trans_STRT_ri(DisasContext *ctx, arg_STRT_ri *a);
typedef arg_ldst_ri arg_STRBT_ri;
static bool trans_STRBT_ri(DisasContext *ctx, arg_STRBT_ri *a);
typedef arg_ldst_ri arg_LDRT_ri;
static bool trans_LDRT_ri(DisasContext *ctx, arg_LDRT_ri *a);
typedef arg_ldst_ri arg_LDRBT_ri;
static bool trans_LDRBT_ri(DisasContext *ctx, arg_LDRBT_ri *a);
typedef arg_disas_a3226 arg_SWP;
static bool trans_SWP(DisasContext *ctx, arg_SWP *a);
typedef arg_disas_a3226 arg_SWPB;
static bool trans_SWPB(DisasContext *ctx, arg_SWPB *a);
typedef arg_strex arg_STREX;
static bool trans_STREX(DisasContext *ctx, arg_STREX *a);
typedef arg_strex arg_STREXD_a32;
static bool trans_STREXD_a32(DisasContext *ctx, arg_STREXD_a32 *a);
typedef arg_strex arg_STREXB;
static bool trans_STREXB(DisasContext *ctx, arg_STREXB *a);
typedef arg_strex arg_STREXH;
static bool trans_STREXH(DisasContext *ctx, arg_STREXH *a);
typedef arg_strex arg_STLEX;
static bool trans_STLEX(DisasContext *ctx, arg_STLEX *a);
typedef arg_strex arg_STLEXD_a32;
static bool trans_STLEXD_a32(DisasContext *ctx, arg_STLEXD_a32 *a);
typedef arg_strex arg_STLEXB;
static bool trans_STLEXB(DisasContext *ctx, arg_STLEXB *a);
typedef arg_strex arg_STLEXH;
static bool trans_STLEXH(DisasContext *ctx, arg_STLEXH *a);
typedef arg_ldrex arg_STL;
static bool trans_STL(DisasContext *ctx, arg_STL *a);
typedef arg_ldrex arg_STLB;
static bool trans_STLB(DisasContext *ctx, arg_STLB *a);
typedef arg_ldrex arg_STLH;
static bool trans_STLH(DisasContext *ctx, arg_STLH *a);
typedef arg_ldrex arg_LDREX;
static bool trans_LDREX(DisasContext *ctx, arg_LDREX *a);
typedef arg_ldrex arg_LDREXD_a32;
static bool trans_LDREXD_a32(DisasContext *ctx, arg_LDREXD_a32 *a);
typedef arg_ldrex arg_LDREXB;
static bool trans_LDREXB(DisasContext *ctx, arg_LDREXB *a);
typedef arg_ldrex arg_LDREXH;
static bool trans_LDREXH(DisasContext *ctx, arg_LDREXH *a);
typedef arg_ldrex arg_LDAEX;
static bool trans_LDAEX(DisasContext *ctx, arg_LDAEX *a);
typedef arg_ldrex arg_LDAEXD_a32;
static bool trans_LDAEXD_a32(DisasContext *ctx, arg_LDAEXD_a32 *a);
typedef arg_ldrex arg_LDAEXB;
static bool trans_LDAEXB(DisasContext *ctx, arg_LDAEXB *a);
typedef arg_ldrex arg_LDAEXH;
static bool trans_LDAEXH(DisasContext *ctx, arg_LDAEXH *a);
typedef arg_ldrex arg_LDA;
static bool trans_LDA(DisasContext *ctx, arg_LDA *a);
typedef arg_ldrex arg_LDAB;
static bool trans_LDAB(DisasContext *ctx, arg_LDAB *a);
typedef arg_ldrex arg_LDAH;
static bool trans_LDAH(DisasContext *ctx, arg_LDAH *a);
typedef arg_rrrr arg_USADA8;
static bool trans_USADA8(DisasContext *ctx, arg_USADA8 *a);
typedef arg_bfx arg_SBFX;
static bool trans_SBFX(DisasContext *ctx, arg_SBFX *a);
typedef arg_bfx arg_UBFX;
static bool trans_UBFX(DisasContext *ctx, arg_UBFX *a);
typedef arg_bfi arg_BFCI;
static bool trans_BFCI(DisasContext *ctx, arg_BFCI *a);
typedef arg_empty arg_UDF;
static bool trans_UDF(DisasContext *ctx, arg_UDF *a);
typedef arg_rrr arg_SADD16;
static bool trans_SADD16(DisasContext *ctx, arg_SADD16 *a);
typedef arg_rrr arg_SASX;
static bool trans_SASX(DisasContext *ctx, arg_SASX *a);
typedef arg_rrr arg_SSAX;
static bool trans_SSAX(DisasContext *ctx, arg_SSAX *a);
typedef arg_rrr arg_SSUB16;
static bool trans_SSUB16(DisasContext *ctx, arg_SSUB16 *a);
typedef arg_rrr arg_SADD8;
static bool trans_SADD8(DisasContext *ctx, arg_SADD8 *a);
typedef arg_rrr arg_SSUB8;
static bool trans_SSUB8(DisasContext *ctx, arg_SSUB8 *a);
typedef arg_rrr arg_QADD16;
static bool trans_QADD16(DisasContext *ctx, arg_QADD16 *a);
typedef arg_rrr arg_QASX;
static bool trans_QASX(DisasContext *ctx, arg_QASX *a);
typedef arg_rrr arg_QSAX;
static bool trans_QSAX(DisasContext *ctx, arg_QSAX *a);
typedef arg_rrr arg_QSUB16;
static bool trans_QSUB16(DisasContext *ctx, arg_QSUB16 *a);
typedef arg_rrr arg_QADD8;
static bool trans_QADD8(DisasContext *ctx, arg_QADD8 *a);
typedef arg_rrr arg_QSUB8;
static bool trans_QSUB8(DisasContext *ctx, arg_QSUB8 *a);
typedef arg_rrr arg_SHADD16;
static bool trans_SHADD16(DisasContext *ctx, arg_SHADD16 *a);
typedef arg_rrr arg_SHASX;
static bool trans_SHASX(DisasContext *ctx, arg_SHASX *a);
typedef arg_rrr arg_SHSAX;
static bool trans_SHSAX(DisasContext *ctx, arg_SHSAX *a);
typedef arg_rrr arg_SHSUB16;
static bool trans_SHSUB16(DisasContext *ctx, arg_SHSUB16 *a);
typedef arg_rrr arg_SHADD8;
static bool trans_SHADD8(DisasContext *ctx, arg_SHADD8 *a);
typedef arg_rrr arg_SHSUB8;
static bool trans_SHSUB8(DisasContext *ctx, arg_SHSUB8 *a);
typedef arg_rrr arg_UADD16;
static bool trans_UADD16(DisasContext *ctx, arg_UADD16 *a);
typedef arg_rrr arg_UASX;
static bool trans_UASX(DisasContext *ctx, arg_UASX *a);
typedef arg_rrr arg_USAX;
static bool trans_USAX(DisasContext *ctx, arg_USAX *a);
typedef arg_rrr arg_USUB16;
static bool trans_USUB16(DisasContext *ctx, arg_USUB16 *a);
typedef arg_rrr arg_UADD8;
static bool trans_UADD8(DisasContext *ctx, arg_UADD8 *a);
typedef arg_rrr arg_USUB8;
static bool trans_USUB8(DisasContext *ctx, arg_USUB8 *a);
typedef arg_rrr arg_UQADD16;
static bool trans_UQADD16(DisasContext *ctx, arg_UQADD16 *a);
typedef arg_rrr arg_UQASX;
static bool trans_UQASX(DisasContext *ctx, arg_UQASX *a);
typedef arg_rrr arg_UQSAX;
static bool trans_UQSAX(DisasContext *ctx, arg_UQSAX *a);
typedef arg_rrr arg_UQSUB16;
static bool trans_UQSUB16(DisasContext *ctx, arg_UQSUB16 *a);
typedef arg_rrr arg_UQADD8;
static bool trans_UQADD8(DisasContext *ctx, arg_UQADD8 *a);
typedef arg_rrr arg_UQSUB8;
static bool trans_UQSUB8(DisasContext *ctx, arg_UQSUB8 *a);
typedef arg_rrr arg_UHADD16;
static bool trans_UHADD16(DisasContext *ctx, arg_UHADD16 *a);
typedef arg_rrr arg_UHASX;
static bool trans_UHASX(DisasContext *ctx, arg_UHASX *a);
typedef arg_rrr arg_UHSAX;
static bool trans_UHSAX(DisasContext *ctx, arg_UHSAX *a);
typedef arg_rrr arg_UHSUB16;
static bool trans_UHSUB16(DisasContext *ctx, arg_UHSUB16 *a);
typedef arg_rrr arg_UHADD8;
static bool trans_UHADD8(DisasContext *ctx, arg_UHADD8 *a);
typedef arg_rrr arg_UHSUB8;
static bool trans_UHSUB8(DisasContext *ctx, arg_UHSUB8 *a);
typedef arg_pkh arg_PKH;
static bool trans_PKH(DisasContext *ctx, arg_PKH *a);
typedef arg_sat arg_SSAT;
static bool trans_SSAT(DisasContext *ctx, arg_SSAT *a);
typedef arg_sat arg_USAT;
static bool trans_USAT(DisasContext *ctx, arg_USAT *a);
typedef arg_sat arg_SSAT16;
static bool trans_SSAT16(DisasContext *ctx, arg_SSAT16 *a);
typedef arg_sat arg_USAT16;
static bool trans_USAT16(DisasContext *ctx, arg_USAT16 *a);
typedef arg_rrr_rot arg_SXTAB16;
static bool trans_SXTAB16(DisasContext *ctx, arg_SXTAB16 *a);
typedef arg_rrr_rot arg_SXTAB;
static bool trans_SXTAB(DisasContext *ctx, arg_SXTAB *a);
typedef arg_rrr_rot arg_SXTAH;
static bool trans_SXTAH(DisasContext *ctx, arg_SXTAH *a);
typedef arg_rrr_rot arg_UXTAB16;
static bool trans_UXTAB16(DisasContext *ctx, arg_UXTAB16 *a);
typedef arg_rrr_rot arg_UXTAB;
static bool trans_UXTAB(DisasContext *ctx, arg_UXTAB *a);
typedef arg_rrr_rot arg_UXTAH;
static bool trans_UXTAH(DisasContext *ctx, arg_UXTAH *a);
typedef arg_rrr arg_SEL;
static bool trans_SEL(DisasContext *ctx, arg_SEL *a);
typedef arg_rr arg_REV;
static bool trans_REV(DisasContext *ctx, arg_REV *a);
typedef arg_rr arg_REV16;
static bool trans_REV16(DisasContext *ctx, arg_REV16 *a);
typedef arg_rr arg_REVSH;
static bool trans_REVSH(DisasContext *ctx, arg_REVSH *a);
typedef arg_rr arg_RBIT;
static bool trans_RBIT(DisasContext *ctx, arg_RBIT *a);
typedef arg_rrrr arg_SMLAD;
static bool trans_SMLAD(DisasContext *ctx, arg_SMLAD *a);
typedef arg_rrrr arg_SMLADX;
static bool trans_SMLADX(DisasContext *ctx, arg_SMLADX *a);
typedef arg_rrrr arg_SMLSD;
static bool trans_SMLSD(DisasContext *ctx, arg_SMLSD *a);
typedef arg_rrrr arg_SMLSDX;
static bool trans_SMLSDX(DisasContext *ctx, arg_SMLSDX *a);
typedef arg_rrr arg_SDIV;
static bool trans_SDIV(DisasContext *ctx, arg_SDIV *a);
typedef arg_rrr arg_UDIV;
static bool trans_UDIV(DisasContext *ctx, arg_UDIV *a);
typedef arg_rrrr arg_SMLALD;
static bool trans_SMLALD(DisasContext *ctx, arg_SMLALD *a);
typedef arg_rrrr arg_SMLALDX;
static bool trans_SMLALDX(DisasContext *ctx, arg_SMLALDX *a);
typedef arg_rrrr arg_SMLSLD;
static bool trans_SMLSLD(DisasContext *ctx, arg_SMLSLD *a);
typedef arg_rrrr arg_SMLSLDX;
static bool trans_SMLSLDX(DisasContext *ctx, arg_SMLSLDX *a);
typedef arg_rrrr arg_SMMLA;
static bool trans_SMMLA(DisasContext *ctx, arg_SMMLA *a);
typedef arg_rrrr arg_SMMLAR;
static bool trans_SMMLAR(DisasContext *ctx, arg_SMMLAR *a);
typedef arg_rrrr arg_SMMLS;
static bool trans_SMMLS(DisasContext *ctx, arg_SMMLS *a);
typedef arg_rrrr arg_SMMLSR;
static bool trans_SMMLSR(DisasContext *ctx, arg_SMMLSR *a);
typedef arg_ldst_block arg_STM;
static bool trans_STM(DisasContext *ctx, arg_STM *a);
typedef arg_ldst_block arg_LDM_a32;
static bool trans_LDM_a32(DisasContext *ctx, arg_LDM_a32 *a);
typedef arg_i arg_B;
static bool trans_B(DisasContext *ctx, arg_B *a);
typedef arg_i arg_BL;
static bool trans_BL(DisasContext *ctx, arg_BL *a);
typedef arg_i arg_SVC;
static bool trans_SVC(DisasContext *ctx, arg_SVC *a);

static void disas_a32_extract_S_xri_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->imm = extract32(insn, 0, 8);
    a->rot = times_2(ctx, extract32(insn, 8, 4));
    a->rd = 0;
    a->s = 1;
}

static void disas_a32_extract_S_xrr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->shim = extract32(insn, 7, 5);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->s = 1;
    a->rd = 0;
}

static void disas_a32_extract_S_xrr_shr(DisasContext *ctx, arg_s_rrr_shr *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rs = extract32(insn, 8, 4);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->rd = 0;
    a->s = 1;
}

static void disas_a32_extract_bfx(DisasContext *ctx, arg_bfx *a, uint32_t insn)
{
    a->widthm1 = extract32(insn, 16, 5);
    a->rd = extract32(insn, 12, 4);
    a->lsb = extract32(insn, 7, 5);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_branch(DisasContext *ctx, arg_i *a, uint32_t insn)
{
    a->imm = times_4(ctx, sextract32(insn, 0, 24));
}

static void disas_a32_extract_disas_a32_Fmt_16(DisasContext *ctx, arg_empty *a, uint32_t insn)
{
}

static void disas_a32_extract_disas_a32_Fmt_20(DisasContext *ctx, arg_mrs_bank *a, uint32_t insn)
{
    a->r = extract32(insn, 22, 1);
    a->rd = extract32(insn, 12, 4);
    a->sysm = deposit32(extract32(insn, 16, 4), 4, 28, extract32(insn, 8, 1));
}

static void disas_a32_extract_disas_a32_Fmt_21(DisasContext *ctx, arg_msr_bank *a, uint32_t insn)
{
    a->r = extract32(insn, 22, 1);
    a->rn = extract32(insn, 0, 4);
    a->sysm = deposit32(extract32(insn, 16, 4), 4, 28, extract32(insn, 8, 1));
}

static void disas_a32_extract_disas_a32_Fmt_22(DisasContext *ctx, arg_mrs_reg *a, uint32_t insn)
{
    a->r = extract32(insn, 22, 1);
    a->rd = extract32(insn, 12, 4);
}

static void disas_a32_extract_disas_a32_Fmt_23(DisasContext *ctx, arg_msr_reg *a, uint32_t insn)
{
    a->r = extract32(insn, 22, 1);
    a->mask = extract32(insn, 16, 4);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_disas_a32_Fmt_24(DisasContext *ctx, arg_i *a, uint32_t insn)
{
    a->imm = extract32(insn, 0, 4);
}

static void disas_a32_extract_disas_a32_Fmt_42(DisasContext *ctx, arg_bfi *a, uint32_t insn)
{
    a->msb = extract32(insn, 16, 5);
    a->rd = extract32(insn, 12, 4);
    a->lsb = extract32(insn, 7, 5);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_disas_a32_Fmt_43(DisasContext *ctx, arg_pkh *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->imm = extract32(insn, 7, 5);
    a->tb = extract32(insn, 6, 1);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_disas_a32_Fmt_48(DisasContext *ctx, arg_ldst_block *a, uint32_t insn)
{
    a->b = extract32(insn, 24, 1);
    a->i = extract32(insn, 23, 1);
    a->u = extract32(insn, 22, 1);
    a->w = extract32(insn, 21, 1);
    a->rn = extract32(insn, 16, 4);
    a->list = extract32(insn, 0, 16);
}

static void disas_a32_extract_disas_a32_Fmt_50(DisasContext *ctx, arg_i *a, uint32_t insn)
{
    a->imm = extract32(insn, 0, 24);
}

static void disas_a32_extract_i16(DisasContext *ctx, arg_i *a, uint32_t insn)
{
    a->imm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 8, 12));
}

static void disas_a32_extract_ldrex(DisasContext *ctx, arg_ldrex *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = 0;
    a->rt2 = 15;
}

static void disas_a32_extract_ldst_ri12_p0w1(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = extract32(insn, 0, 12);
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_ldst_ri12_p1w(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->w = extract32(insn, 21, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = extract32(insn, 0, 12);
    a->p = 1;
}

static void disas_a32_extract_ldst_ri12_pw0(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = extract32(insn, 0, 12);
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_ldst_ri8_p0w1(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 8, 4));
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_ldst_ri8_p1w(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->w = extract32(insn, 21, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 8, 4));
    a->p = 1;
}

static void disas_a32_extract_ldst_ri8_pw0(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->imm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 8, 4));
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_ldst_rr_p0w1(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->rm = extract32(insn, 0, 4);
    a->p = 0;
    a->w = 0;
    a->shimm = 0;
    a->shtype = 0;
}

static void disas_a32_extract_ldst_rr_p1w(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->w = extract32(insn, 21, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->rm = extract32(insn, 0, 4);
    a->p = 1;
    a->shimm = 0;
    a->shtype = 0;
}

static void disas_a32_extract_ldst_rr_pw0(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->rm = extract32(insn, 0, 4);
    a->p = 0;
    a->w = 0;
    a->shimm = 0;
    a->shtype = 0;
}

static void disas_a32_extract_ldst_rs_p0w1(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->shimm = extract32(insn, 7, 5);
    a->shtype = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_ldst_rs_p1w(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->w = extract32(insn, 21, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->shimm = extract32(insn, 7, 5);
    a->shtype = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->p = 1;
}

static void disas_a32_extract_ldst_rs_pw0(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
{
    a->u = extract32(insn, 23, 1);
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->shimm = extract32(insn, 7, 5);
    a->shtype = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->p = 0;
    a->w = 0;
}

static void disas_a32_extract_mov16(DisasContext *ctx, arg_ri *a, uint32_t insn)
{
    a->rd = extract32(insn, 12, 4);
    a->imm = deposit32(extract32(insn, 0, 12), 12, 20, extract32(insn, 16, 4));
}

static void disas_a32_extract_msr_i(DisasContext *ctx, arg_msr_i *a, uint32_t insn)
{
    a->mask = extract32(insn, 16, 4);
    a->rot = extract32(insn, 8, 4);
    a->imm = extract32(insn, 0, 8);
}

static void disas_a32_extract_rd0mn(DisasContext *ctx, arg_rrrr *a, uint32_t insn)
{
    a->rd = extract32(insn, 16, 4);
    a->rm = extract32(insn, 8, 4);
    a->rn = extract32(insn, 0, 4);
    a->ra = 0;
}

static void disas_a32_extract_rdamn(DisasContext *ctx, arg_rrrr *a, uint32_t insn)
{
    a->rd = extract32(insn, 16, 4);
    a->ra = extract32(insn, 12, 4);
    a->rm = extract32(insn, 8, 4);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_rdm(DisasContext *ctx, arg_rr *a, uint32_t insn)
{
    a->rd = extract32(insn, 12, 4);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_rdmn(DisasContext *ctx, arg_rrr *a, uint32_t insn)
{
    a->rd = extract32(insn, 16, 4);
    a->rm = extract32(insn, 8, 4);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_rm(DisasContext *ctx, arg_r *a, uint32_t insn)
{
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_rndm(DisasContext *ctx, arg_rrr *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_rrr_rot(DisasContext *ctx, arg_rrr_rot *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->rot = extract32(insn, 10, 2);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_s_rd0mn(DisasContext *ctx, arg_s_rrrr *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rd = extract32(insn, 16, 4);
    a->rm = extract32(insn, 8, 4);
    a->rn = extract32(insn, 0, 4);
    a->ra = 0;
}

static void disas_a32_extract_s_rdamn(DisasContext *ctx, arg_s_rrrr *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rd = extract32(insn, 16, 4);
    a->ra = extract32(insn, 12, 4);
    a->rm = extract32(insn, 8, 4);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_s_rri_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->imm = extract32(insn, 0, 8);
    a->rot = times_2(ctx, extract32(insn, 8, 4));
}

static void disas_a32_extract_s_rrr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->shim = extract32(insn, 7, 5);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_s_rrr_shr(DisasContext *ctx, arg_s_rrr_shr *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->rs = extract32(insn, 8, 4);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
}

static void disas_a32_extract_s_rxi_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rd = extract32(insn, 12, 4);
    a->imm = extract32(insn, 0, 8);
    a->rot = times_2(ctx, extract32(insn, 8, 4));
    a->rn = 0;
}

static void disas_a32_extract_s_rxr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rd = extract32(insn, 12, 4);
    a->shim = extract32(insn, 7, 5);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->rn = 0;
}

static void disas_a32_extract_s_rxr_shr(DisasContext *ctx, arg_s_rrr_shr *a, uint32_t insn)
{
    a->s = extract32(insn, 20, 1);
    a->rd = extract32(insn, 12, 4);
    a->rs = extract32(insn, 8, 4);
    a->shty = extract32(insn, 5, 2);
    a->rm = extract32(insn, 0, 4);
    a->rn = 0;
}

static void disas_a32_extract_sat(DisasContext *ctx, arg_sat *a, uint32_t insn)
{
    a->satimm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 12, 4);
    a->imm = extract32(insn, 7, 5);
    a->sh = extract32(insn, 6, 1);
    a->rn = extract32(insn, 0, 4);
}

static void disas_a32_extract_sat16(DisasContext *ctx, arg_sat *a, uint32_t insn)
{
    a->satimm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->rn = extract32(insn, 0, 4);
    a->imm = 0;
    a->sh = 0;
}

static void disas_a32_extract_stl(DisasContext *ctx, arg_ldrex *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 0, 4);
    a->imm = 0;
    a->rt2 = 15;
}

static void disas_a32_extract_strex(DisasContext *ctx, arg_strex *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rd = extract32(insn, 12, 4);
    a->rt = extract32(insn, 0, 4);
    a->imm = 0;
    a->rt2 = 15;
}

static void disas_a32_extract_swp(DisasContext *ctx, arg_disas_a3226 *a, uint32_t insn)
{
    a->rn = extract32(insn, 16, 4);
    a->rt = extract32(insn, 12, 4);
    a->rt2 = extract32(insn, 0, 4);
}

static bool disas_a32(DisasContext *ctx, uint32_t insn)
{
    union {
        arg_bfi f_bfi;
        arg_bfx f_bfx;
        arg_disas_a3226 f_disas_a3226;
        arg_empty f_empty;
        arg_i f_i;
        arg_ldrex f_ldrex;
        arg_ldst_block f_ldst_block;
        arg_ldst_ri f_ldst_ri;
        arg_ldst_rr f_ldst_rr;
        arg_mrs_bank f_mrs_bank;
        arg_mrs_reg f_mrs_reg;
        arg_msr_bank f_msr_bank;
        arg_msr_i f_msr_i;
        arg_msr_reg f_msr_reg;
        arg_pkh f_pkh;
        arg_r f_r;
        arg_ri f_ri;
        arg_rr f_rr;
        arg_rrr f_rrr;
        arg_rrr_rot f_rrr_rot;
        arg_rrrr f_rrrr;
        arg_s_rri_rot f_s_rri_rot;
        arg_s_rrr_shi f_s_rrr_shi;
        arg_s_rrr_shr f_s_rrr_shr;
        arg_s_rrrr f_s_rrrr;
        arg_sat f_sat;
        arg_strex f_strex;
    } u;

    switch ((insn >> 25) & 0x7) {
    case 0x0:
        /* ....000. ........ ........ ........ */
        switch (insn & 0x01000010) {
        case 0x00000000:
            /* ....0000 ........ ........ ...0.... */
            disas_a32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
            switch ((insn >> 21) & 0x7) {
            case 0x0:
                /* ....0000 000..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:60 */
                if (trans_AND_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x1:
                /* ....0000 001..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:61 */
                if (trans_EOR_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x2:
                /* ....0000 010..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:62 */
                if (trans_SUB_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x3:
                /* ....0000 011..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:63 */
                if (trans_RSB_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x4:
                /* ....0000 100..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:64 */
                if (trans_ADD_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x5:
                /* ....0000 101..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:65 */
                if (trans_ADC_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x6:
                /* ....0000 110..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:66 */
                if (trans_SBC_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            case 0x7:
                /* ....0000 111..... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:67 */
                if (trans_RSC_rrri(ctx, &u.f_s_rrr_shi)) return true;
                return false;
            }
            return false;
        case 0x00000010:
            /* ....0000 ........ ........ ...1.... */
            switch (insn & 0x00600080) {
            case 0x00000000:
                /* ....0000 .00..... ........ 0..1.... */
                disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                switch ((insn >> 23) & 0x1) {
                case 0x0:
                    /* ....0000 000..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:92 */
                    if (trans_AND_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x1:
                    /* ....0000 100..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:96 */
                    if (trans_ADD_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                }
                return false;
            case 0x00000080:
                /* ....0000 .00..... ........ 1..1.... */
                switch ((insn >> 5) & 0x3) {
                case 0x0:
                    /* ....0000 .00..... ........ 1001.... */
                    switch ((insn >> 23) & 0x1) {
                    case 0x0:
                        /* ....0000 000..... ........ 1001.... */
                        disas_a32_extract_s_rd0mn(ctx, &u.f_s_rrrr, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0x0:
                            /* ....0000 000..... 0000.... 1001.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:144 */
                            if (trans_MUL(ctx, &u.f_s_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0000 100..... ........ 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:148 */
                        disas_a32_extract_s_rdamn(ctx, &u.f_s_rrrr, insn);
                        if (trans_UMULL(ctx, &u.f_s_rrrr)) return true;
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0000 .00..... ........ 1011.... */
                    disas_a32_extract_ldst_rr_pw0(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00000000:
                        /* ....0000 .000.... ....0000 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:249 */
                        if (trans_STRH_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    case 0x00100000:
                        /* ....0000 .001.... ....0000 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:258 */
                        if (trans_LDRH_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x2:
                    /* ....0000 .00..... ........ 1101.... */
                    disas_a32_extract_ldst_rr_pw0(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00000000:
                        /* ....0000 .000.... ....0000 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:252 */
                        if (trans_LDRD_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    case 0x00100000:
                        /* ....0000 .001.... ....0000 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:261 */
                        if (trans_LDRSB_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x3:
                    /* ....0000 .00..... ........ 1111.... */
                    disas_a32_extract_ldst_rr_pw0(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00000000:
                        /* ....0000 .000.... ....0000 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:255 */
                        if (trans_STRD_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    case 0x00100000:
                        /* ....0000 .001.... ....0000 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:264 */
                        if (trans_LDRSH_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00200000:
                /* ....0000 .01..... ........ 0..1.... */
                disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                switch ((insn >> 23) & 0x1) {
                case 0x0:
                    /* ....0000 001..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:93 */
                    if (trans_EOR_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x1:
                    /* ....0000 101..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:97 */
                    if (trans_ADC_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                }
                return false;
            case 0x00200080:
                /* ....0000 .01..... ........ 1..1.... */
                switch ((insn >> 5) & 0x3) {
                case 0x0:
                    /* ....0000 .01..... ........ 1001.... */
                    disas_a32_extract_s_rdamn(ctx, &u.f_s_rrrr, insn);
                    switch ((insn >> 23) & 0x1) {
                    case 0x0:
                        /* ....0000 001..... ........ 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:145 */
                        if (trans_MLA(ctx, &u.f_s_rrrr)) return true;
                        return false;
                    case 0x1:
                        /* ....0000 101..... ........ 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:149 */
                        if (trans_UMLAL(ctx, &u.f_s_rrrr)) return true;
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0000 .01..... ........ 1011.... */
                    disas_a32_extract_ldst_rr_p0w1(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00000000:
                        /* ....0000 .010.... ....0000 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:272 */
                        if (trans_STRHT_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    case 0x00100000:
                        /* ....0000 .011.... ....0000 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:273 */
                        if (trans_LDRHT_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x2:
                    /* ....0000 .01..... ........ 1101.... */
                    disas_a32_extract_ldst_rr_p0w1(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00100000:
                        /* ....0000 .011.... ....0000 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:274 */
                        if (trans_LDRSBT_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x3:
                    /* ....0000 .01..... ........ 1111.... */
                    disas_a32_extract_ldst_rr_p0w1(ctx, &u.f_ldst_rr, insn);
                    switch (insn & 0x00100f00) {
                    case 0x00100000:
                        /* ....0000 .011.... ....0000 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:275 */
                        if (trans_LDRSHT_rr(ctx, &u.f_ldst_rr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00400000:
                /* ....0000 .10..... ........ 0..1.... */
                disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                switch ((insn >> 23) & 0x1) {
                case 0x0:
                    /* ....0000 010..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:94 */
                    if (trans_SUB_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x1:
                    /* ....0000 110..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:98 */
                    if (trans_SBC_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                }
                return false;
            case 0x00400080:
                /* ....0000 .10..... ........ 1..1.... */
                switch ((insn >> 5) & 0x3) {
                case 0x0:
                    /* ....0000 .10..... ........ 1001.... */
                    switch ((insn >> 23) & 0x1) {
                    case 0x0:
                        /* ....0000 010..... ........ 1001.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 20) & 0x1) {
                        case 0x0:
                            /* ....0000 0100.... ........ 1001.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:146 */
                            if (trans_UMAAL(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0000 110..... ........ 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:150 */
                        disas_a32_extract_s_rdamn(ctx, &u.f_s_rrrr, insn);
                        if (trans_SMULL(ctx, &u.f_s_rrrr)) return true;
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0000 .10..... ........ 1011.... */
                    disas_a32_extract_ldst_ri8_pw0(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0000 .100.... ........ 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:310 */
                        if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    case 0x1:
                        /* ....0000 .101.... ........ 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:319 */
                        if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                case 0x2:
                    /* ....0000 .10..... ........ 1101.... */
                    disas_a32_extract_ldst_ri8_pw0(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0000 .100.... ........ 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:313 */
                        if (trans_LDRD_ri_a32(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    case 0x1:
                        /* ....0000 .101.... ........ 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:322 */
                        if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                case 0x3:
                    /* ....0000 .10..... ........ 1111.... */
                    disas_a32_extract_ldst_ri8_pw0(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0000 .100.... ........ 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:316 */
                        if (trans_STRD_ri_a32(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    case 0x1:
                        /* ....0000 .101.... ........ 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:325 */
                        if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00600000:
                /* ....0000 .11..... ........ 0..1.... */
                disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                switch ((insn >> 23) & 0x1) {
                case 0x0:
                    /* ....0000 011..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:95 */
                    if (trans_RSB_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x1:
                    /* ....0000 111..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:99 */
                    if (trans_RSC_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                }
                return false;
            case 0x00600080:
                /* ....0000 .11..... ........ 1..1.... */
                switch ((insn >> 5) & 0x3) {
                case 0x0:
                    /* ....0000 .11..... ........ 1001.... */
                    switch ((insn >> 23) & 0x1) {
                    case 0x0:
                        /* ....0000 011..... ........ 1001.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 20) & 0x1) {
                        case 0x0:
                            /* ....0000 0110.... ........ 1001.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:147 */
                            if (trans_MLS(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0000 111..... ........ 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:151 */
                        disas_a32_extract_s_rdamn(ctx, &u.f_s_rrrr, insn);
                        if (trans_SMLAL(ctx, &u.f_s_rrrr)) return true;
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0000 .11..... ........ 1011.... */
                    disas_a32_extract_ldst_ri8_p0w1(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0000 .110.... ........ 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:333 */
                        if (trans_STRHT_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    case 0x1:
                        /* ....0000 .111.... ........ 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:334 */
                        if (trans_LDRHT_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                case 0x2:
                    /* ....0000 .11..... ........ 1101.... */
                    disas_a32_extract_ldst_ri8_p0w1(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x1:
                        /* ....0000 .111.... ........ 1101.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:335 */
                        if (trans_LDRSBT_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                case 0x3:
                    /* ....0000 .11..... ........ 1111.... */
                    disas_a32_extract_ldst_ri8_p0w1(ctx, &u.f_ldst_ri, insn);
                    switch ((insn >> 20) & 0x1) {
                    case 0x1:
                        /* ....0000 .111.... ........ 1111.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:336 */
                        if (trans_LDRSHT_ri(ctx, &u.f_ldst_ri)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            }
            return false;
        case 0x01000000:
            /* ....0001 ........ ........ ...0.... */
            switch (insn & 0x00a00000) {
            case 0x00000000:
                /* ....0001 0.0..... ........ ...0.... */
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* ....0001 0.00.... ........ ...0.... */
                    switch ((insn >> 5) & 0x7) {
                    case 0x0:
                        /* ....0001 0.00.... ........ 0000.... */
                        switch (insn & 0x00000e0f) {
                        case 0x00000000:
                            /* ....0001 0.00.... ....000. 00000000 */
                            disas_a32_extract_disas_a32_Fmt_22(ctx, &u.f_mrs_reg, insn);
                            switch (insn & 0x000f0100) {
                            case 0x000f0000:
                                /* ....0001 0.001111 ....0000 00000000 */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:226 */
                                if (trans_MRS_reg(ctx, &u.f_mrs_reg)) return true;
                                return false;
                            }
                            return false;
                        case 0x00000200:
                            /* ....0001 0.00.... ....001. 00000000 */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:223 */
                            disas_a32_extract_disas_a32_Fmt_20(ctx, &u.f_mrs_bank, insn);
                            if (trans_MRS_bank(ctx, &u.f_mrs_bank)) return true;
                            return false;
                        }
                        return false;
                    case 0x2:
                        /* ....0001 0.00.... ........ 0100.... */
                        disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                        switch (insn & 0x00400f00) {
                        case 0x00000000:
                            /* ....0001 0000.... ....0000 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:207 */
                            if (trans_CRC32B(ctx, &u.f_rrr)) return true;
                            return false;
                        case 0x00000200:
                            /* ....0001 0000.... ....0010 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:210 */
                            if (trans_CRC32CB(ctx, &u.f_rrr)) return true;
                            return false;
                        case 0x00400000:
                            /* ....0001 0100.... ....0000 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:209 */
                            if (trans_CRC32W(ctx, &u.f_rrr)) return true;
                            return false;
                        case 0x00400200:
                            /* ....0001 0100.... ....0010 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:212 */
                            if (trans_CRC32CW(ctx, &u.f_rrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x4:
                        /* ....0001 0.00.... ........ 1000.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0000.... ........ 1000.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:164 */
                            if (trans_SMLABB(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0100.... ........ 1000.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:172 */
                            if (trans_SMLALBB(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x5:
                        /* ....0001 0.00.... ........ 1010.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0000.... ........ 1010.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:166 */
                            if (trans_SMLATB(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0100.... ........ 1010.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:174 */
                            if (trans_SMLALTB(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x6:
                        /* ....0001 0.00.... ........ 1100.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0000.... ........ 1100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:165 */
                            if (trans_SMLABT(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0100.... ........ 1100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:173 */
                            if (trans_SMLALBT(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x7:
                        /* ....0001 0.00.... ........ 1110.... */
                        disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0000.... ........ 1110.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:167 */
                            if (trans_SMLATT(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0100.... ........ 1110.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:175 */
                            if (trans_SMLALTT(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0001 0.01.... ........ ...0.... */
                    disas_a32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
                    switch (insn & 0x0040f000) {
                    case 0x00000000:
                        /* ....0001 0001.... 0000.... ...0.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:68 */
                        if (trans_TST_xrri(ctx, &u.f_s_rrr_shi)) return true;
                        return false;
                    case 0x00400000:
                        /* ....0001 0101.... 0000.... ...0.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:70 */
                        if (trans_CMP_xrri(ctx, &u.f_s_rrr_shi)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00200000:
                /* ....0001 0.1..... ........ ...0.... */
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* ....0001 0.10.... ........ ...0.... */
                    switch ((insn >> 5) & 0x7) {
                    case 0x0:
                        /* ....0001 0.10.... ........ 0000.... */
                        switch ((insn >> 9) & 0x7f) {
                        case 0x78:
                            /* ....0001 0.10.... 1111000. 0000.... */
                            disas_a32_extract_disas_a32_Fmt_23(ctx, &u.f_msr_reg, insn);
                            switch ((insn >> 8) & 0x1) {
                            case 0x0:
                                /* ....0001 0.10.... 11110000 0000.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:227 */
                                if (trans_MSR_reg(ctx, &u.f_msr_reg)) return true;
                                return false;
                            }
                            return false;
                        case 0x79:
                            /* ....0001 0.10.... 1111001. 0000.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:224 */
                            disas_a32_extract_disas_a32_Fmt_21(ctx, &u.f_msr_bank, insn);
                            if (trans_MSR_bank(ctx, &u.f_msr_bank)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0001 0.10.... ........ 0010.... */
                        disas_a32_extract_rm(ctx, &u.f_r, insn);
                        switch (insn & 0x004fff00) {
                        case 0x000fff00:
                            /* ....0001 00101111 11111111 0010.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:230 */
                            if (trans_BXJ(ctx, &u.f_r)) return true;
                            return false;
                        }
                        return false;
                    case 0x2:
                        /* ....0001 0.10.... ........ 0100.... */
                        disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                        switch (insn & 0x00400f00) {
                        case 0x00000000:
                            /* ....0001 0010.... ....0000 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:208 */
                            if (trans_CRC32H(ctx, &u.f_rrr)) return true;
                            return false;
                        case 0x00000200:
                            /* ....0001 0010.... ....0010 0100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:211 */
                            if (trans_CRC32CH(ctx, &u.f_rrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x3:
                        /* ....0001 0.10.... ........ 0110.... */
                        disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                        switch (insn & 0x004fff0f) {
                        case 0x0040000e:
                            /* ....0001 01100000 00000000 01101110 */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:235 */
                            if (trans_ERET(ctx, &u.f_empty)) return true;
                            return false;
                        }
                        return false;
                    case 0x4:
                        /* ....0001 0.10.... ........ 1000.... */
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0010.... ........ 1000.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:168 */
                            disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                            if (trans_SMLAWB(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0110.... ........ 1000.... */
                            disas_a32_extract_rd0mn(ctx, &u.f_rrrr, insn);
                            switch ((insn >> 12) & 0xf) {
                            case 0x0:
                                /* ....0001 0110.... 0000.... 1000.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:176 */
                                if (trans_SMULBB(ctx, &u.f_rrrr)) return true;
                                return false;
                            }
                            return false;
                        }
                        return false;
                    case 0x5:
                        /* ....0001 0.10.... ........ 1010.... */
                        disas_a32_extract_rd0mn(ctx, &u.f_rrrr, insn);
                        switch (insn & 0x0040f000) {
                        case 0x00000000:
                            /* ....0001 0010.... 0000.... 1010.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:169 */
                            if (trans_SMULWB(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x00400000:
                            /* ....0001 0110.... 0000.... 1010.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:178 */
                            if (trans_SMULTB(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    case 0x6:
                        /* ....0001 0.10.... ........ 1100.... */
                        switch ((insn >> 22) & 0x1) {
                        case 0x0:
                            /* ....0001 0010.... ........ 1100.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:170 */
                            disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                            if (trans_SMLAWT(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x1:
                            /* ....0001 0110.... ........ 1100.... */
                            disas_a32_extract_rd0mn(ctx, &u.f_rrrr, insn);
                            switch ((insn >> 12) & 0xf) {
                            case 0x0:
                                /* ....0001 0110.... 0000.... 1100.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:177 */
                                if (trans_SMULBT(ctx, &u.f_rrrr)) return true;
                                return false;
                            }
                            return false;
                        }
                        return false;
                    case 0x7:
                        /* ....0001 0.10.... ........ 1110.... */
                        disas_a32_extract_rd0mn(ctx, &u.f_rrrr, insn);
                        switch (insn & 0x0040f000) {
                        case 0x00000000:
                            /* ....0001 0010.... 0000.... 1110.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:171 */
                            if (trans_SMULWT(ctx, &u.f_rrrr)) return true;
                            return false;
                        case 0x00400000:
                            /* ....0001 0110.... 0000.... 1110.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:179 */
                            if (trans_SMULTT(ctx, &u.f_rrrr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x1:
                    /* ....0001 0.11.... ........ ...0.... */
                    disas_a32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
                    switch (insn & 0x0040f000) {
                    case 0x00000000:
                        /* ....0001 0011.... 0000.... ...0.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:69 */
                        if (trans_TEQ_xrri(ctx, &u.f_s_rrr_shi)) return true;
                        return false;
                    case 0x00400000:
                        /* ....0001 0111.... 0000.... ...0.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:71 */
                        if (trans_CMN_xrri(ctx, &u.f_s_rrr_shi)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00800000:
                /* ....0001 1.0..... ........ ...0.... */
                disas_a32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* ....0001 100..... ........ ...0.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:72 */
                    if (trans_ORR_rrri(ctx, &u.f_s_rrr_shi)) return true;
                    return false;
                case 0x1:
                    /* ....0001 110..... ........ ...0.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:74 */
                    if (trans_BIC_rrri(ctx, &u.f_s_rrr_shi)) return true;
                    return false;
                }
                return false;
            case 0x00a00000:
                /* ....0001 1.1..... ........ ...0.... */
                disas_a32_extract_s_rxr_shi(ctx, &u.f_s_rrr_shi, insn);
                switch (insn & 0x004f0000) {
                case 0x00000000:
                    /* ....0001 101.0000 ........ ...0.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:73 */
                    if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
                    return false;
                case 0x00400000:
                    /* ....0001 111.0000 ........ ...0.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:75 */
                    if (trans_MVN_rxri(ctx, &u.f_s_rrr_shi)) return true;
                    return false;
                }
                return false;
            }
            return false;
        case 0x01000010:
            /* ....0001 ........ ........ ...1.... */
            switch (insn & 0x00400080) {
            case 0x00000000:
                /* ....0001 .0...... ........ 0..1.... */
                switch (insn & 0x00a00000) {
                case 0x00000000:
                    /* ....0001 000..... ........ 0..1.... */
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0001 0000.... ........ 0..1.... */
                        switch ((insn >> 5) & 0x3) {
                        case 0x2:
                            /* ....0001 0000.... ........ 0101.... */
                            disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                            switch ((insn >> 8) & 0xf) {
                            case 0x0:
                                /* ....0001 0000.... ....0000 0101.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:157 */
                                if (trans_QADD(ctx, &u.f_rrr)) return true;
                                return false;
                            }
                            return false;
                        case 0x3:
                            /* ....0001 0000.... ........ 0111.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:237 */
                            disas_a32_extract_i16(ctx, &u.f_i, insn);
                            if (trans_HLT(ctx, &u.f_i)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0001 0001.... ........ 0..1.... */
                        disas_a32_extract_S_xrr_shr(ctx, &u.f_s_rrr_shr, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0x0:
                            /* ....0001 0001.... 0000.... 0..1.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:100 */
                            if (trans_TST_xrrr(ctx, &u.f_s_rrr_shr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x00200000:
                    /* ....0001 001..... ........ 0..1.... */
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0001 0010.... ........ 0..1.... */
                        switch ((insn >> 5) & 0x3) {
                        case 0x0:
                            /* ....0001 0010.... ........ 0001.... */
                            disas_a32_extract_rm(ctx, &u.f_r, insn);
                            switch ((insn >> 8) & 0xfff) {
                            case 0xfff:
                                /* ....0001 00101111 11111111 0001.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:229 */
                                if (trans_BX(ctx, &u.f_r)) return true;
                                return false;
                            }
                            return false;
                        case 0x1:
                            /* ....0001 0010.... ........ 0011.... */
                            disas_a32_extract_rm(ctx, &u.f_r, insn);
                            switch ((insn >> 8) & 0xfff) {
                            case 0xfff:
                                /* ....0001 00101111 11111111 0011.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:231 */
                                if (trans_BLX_r(ctx, &u.f_r)) return true;
                                return false;
                            }
                            return false;
                        case 0x2:
                            /* ....0001 0010.... ........ 0101.... */
                            disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                            switch ((insn >> 8) & 0xf) {
                            case 0x0:
                                /* ....0001 0010.... ....0000 0101.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:158 */
                                if (trans_QSUB(ctx, &u.f_rrr)) return true;
                                return false;
                            }
                            return false;
                        case 0x3:
                            /* ....0001 0010.... ........ 0111.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:238 */
                            disas_a32_extract_i16(ctx, &u.f_i, insn);
                            if (trans_BKPT(ctx, &u.f_i)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0001 0011.... ........ 0..1.... */
                        disas_a32_extract_S_xrr_shr(ctx, &u.f_s_rrr_shr, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0x0:
                            /* ....0001 0011.... 0000.... 0..1.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:101 */
                            if (trans_TEQ_xrrr(ctx, &u.f_s_rrr_shr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x00800000:
                    /* ....0001 100..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:104 */
                    disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                    if (trans_ORR_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x00a00000:
                    /* ....0001 101..... ........ 0..1.... */
                    disas_a32_extract_s_rxr_shr(ctx, &u.f_s_rrr_shr, insn);
                    switch ((insn >> 16) & 0xf) {
                    case 0x0:
                        /* ....0001 101.0000 ........ 0..1.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:105 */
                        if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00000080:
                /* ....0001 .0...... ........ 1..1.... */
                switch (insn & 0x00100f60) {
                case 0x00000000:
                    /* ....0001 .0.0.... ....0000 1001.... */
                    disas_a32_extract_swp(ctx, &u.f_disas_a3226, insn);
                    switch (insn & 0x00a00000) {
                    case 0x00000000:
                        /* ....0001 0000.... ....0000 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:364 */
                        if (trans_SWP(ctx, &u.f_disas_a3226)) return true;
                        return false;
                    }
                    return false;
                case 0x00000020:
                    /* ....0001 .0.0.... ....0000 1011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:250 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_STRH_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00000040:
                    /* ....0001 .0.0.... ....0000 1101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:253 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_LDRD_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00000060:
                    /* ....0001 .0.0.... ....0000 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:256 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_STRD_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00000c00:
                    /* ....0001 .0.0.... ....1100 1001.... */
                    disas_a32_extract_stl(ctx, &u.f_ldrex, insn);
                    switch (insn & 0x00a0f000) {
                    case 0x0080f000:
                        /* ....0001 1000.... 11111100 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:388 */
                        if (trans_STL(ctx, &u.f_ldrex)) return true;
                        return false;
                    }
                    return false;
                case 0x00000e00:
                    /* ....0001 .0.0.... ....1110 1001.... */
                    disas_a32_extract_strex(ctx, &u.f_strex, insn);
                    switch (insn & 0x00a00000) {
                    case 0x00800000:
                        /* ....0001 1000.... ....1110 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:383 */
                        if (trans_STLEX(ctx, &u.f_strex)) return true;
                        return false;
                    case 0x00a00000:
                        /* ....0001 1010.... ....1110 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:384 */
                        if (trans_STLEXD_a32(ctx, &u.f_strex)) return true;
                        return false;
                    }
                    return false;
                case 0x00000f00:
                    /* ....0001 .0.0.... ....1111 1001.... */
                    disas_a32_extract_strex(ctx, &u.f_strex, insn);
                    switch (insn & 0x00a00000) {
                    case 0x00800000:
                        /* ....0001 1000.... ....1111 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:378 */
                        if (trans_STREX(ctx, &u.f_strex)) return true;
                        return false;
                    case 0x00a00000:
                        /* ....0001 1010.... ....1111 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:379 */
                        if (trans_STREXD_a32(ctx, &u.f_strex)) return true;
                        return false;
                    }
                    return false;
                case 0x00100020:
                    /* ....0001 .0.1.... ....0000 1011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:259 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_LDRH_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00100040:
                    /* ....0001 .0.1.... ....0000 1101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:262 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_LDRSB_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00100060:
                    /* ....0001 .0.1.... ....0000 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:265 */
                    disas_a32_extract_ldst_rr_p1w(ctx, &u.f_ldst_rr, insn);
                    if (trans_LDRSH_rr(ctx, &u.f_ldst_rr)) return true;
                    return false;
                case 0x00100c00:
                    /* ....0001 .0.1.... ....1100 1001.... */
                    disas_a32_extract_ldrex(ctx, &u.f_ldrex, insn);
                    switch (insn & 0x00a0000f) {
                    case 0x0080000f:
                        /* ....0001 1001.... ....1100 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:402 */
                        if (trans_LDA(ctx, &u.f_ldrex)) return true;
                        return false;
                    }
                    return false;
                case 0x00100e00:
                    /* ....0001 .0.1.... ....1110 1001.... */
                    disas_a32_extract_ldrex(ctx, &u.f_ldrex, insn);
                    switch (insn & 0x00a0000f) {
                    case 0x0080000f:
                        /* ....0001 1001.... ....1110 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:397 */
                        if (trans_LDAEX(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00a0000f:
                        /* ....0001 1011.... ....1110 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:398 */
                        if (trans_LDAEXD_a32(ctx, &u.f_ldrex)) return true;
                        return false;
                    }
                    return false;
                case 0x00100f00:
                    /* ....0001 .0.1.... ....1111 1001.... */
                    disas_a32_extract_ldrex(ctx, &u.f_ldrex, insn);
                    switch (insn & 0x00a0000f) {
                    case 0x0080000f:
                        /* ....0001 1001.... ....1111 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:392 */
                        if (trans_LDREX(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00a0000f:
                        /* ....0001 1011.... ....1111 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:393 */
                        if (trans_LDREXD_a32(ctx, &u.f_ldrex)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00400000:
                /* ....0001 .1...... ........ 0..1.... */
                switch (insn & 0x00a00000) {
                case 0x00000000:
                    /* ....0001 010..... ........ 0..1.... */
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0001 0100.... ........ 0..1.... */
                        switch ((insn >> 5) & 0x3) {
                        case 0x2:
                            /* ....0001 0100.... ........ 0101.... */
                            disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                            switch ((insn >> 8) & 0xf) {
                            case 0x0:
                                /* ....0001 0100.... ....0000 0101.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:159 */
                                if (trans_QDADD(ctx, &u.f_rrr)) return true;
                                return false;
                            }
                            return false;
                        case 0x3:
                            /* ....0001 0100.... ........ 0111.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:239 */
                            disas_a32_extract_i16(ctx, &u.f_i, insn);
                            if (trans_HVC(ctx, &u.f_i)) return true;
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0001 0101.... ........ 0..1.... */
                        disas_a32_extract_S_xrr_shr(ctx, &u.f_s_rrr_shr, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0x0:
                            /* ....0001 0101.... 0000.... 0..1.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:102 */
                            if (trans_CMP_xrrr(ctx, &u.f_s_rrr_shr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x00200000:
                    /* ....0001 011..... ........ 0..1.... */
                    switch ((insn >> 20) & 0x1) {
                    case 0x0:
                        /* ....0001 0110.... ........ 0..1.... */
                        switch (insn & 0x00000f60) {
                        case 0x00000040:
                            /* ....0001 0110.... ....0000 0101.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:160 */
                            disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                            if (trans_QDSUB(ctx, &u.f_rrr)) return true;
                            return false;
                        case 0x00000060:
                            /* ....0001 0110.... ....0000 0111.... */
                            disas_a32_extract_disas_a32_Fmt_24(ctx, &u.f_i, insn);
                            switch ((insn >> 12) & 0xff) {
                            case 0x0:
                                /* ....0001 01100000 00000000 0111.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:240 */
                                if (trans_SMC(ctx, &u.f_i)) return true;
                                return false;
                            }
                            return false;
                        case 0x00000f00:
                            /* ....0001 0110.... ....1111 0001.... */
                            disas_a32_extract_rdm(ctx, &u.f_rr, insn);
                            switch ((insn >> 16) & 0xf) {
                            case 0xf:
                                /* ....0001 01101111 ....1111 0001.... */
                                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:233 */
                                if (trans_CLZ(ctx, &u.f_rr)) return true;
                                return false;
                            }
                            return false;
                        }
                        return false;
                    case 0x1:
                        /* ....0001 0111.... ........ 0..1.... */
                        disas_a32_extract_S_xrr_shr(ctx, &u.f_s_rrr_shr, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0x0:
                            /* ....0001 0111.... 0000.... 0..1.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:103 */
                            if (trans_CMN_xrrr(ctx, &u.f_s_rrr_shr)) return true;
                            return false;
                        }
                        return false;
                    }
                    return false;
                case 0x00800000:
                    /* ....0001 110..... ........ 0..1.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:106 */
                    disas_a32_extract_s_rrr_shr(ctx, &u.f_s_rrr_shr, insn);
                    if (trans_BIC_rrrr(ctx, &u.f_s_rrr_shr)) return true;
                    return false;
                case 0x00a00000:
                    /* ....0001 111..... ........ 0..1.... */
                    disas_a32_extract_s_rxr_shr(ctx, &u.f_s_rrr_shr, insn);
                    switch ((insn >> 16) & 0xf) {
                    case 0x0:
                        /* ....0001 111.0000 ........ 0..1.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:107 */
                        if (trans_MVN_rxrr(ctx, &u.f_s_rrr_shr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00400080:
                /* ....0001 .1...... ........ 1..1.... */
                switch (insn & 0x00100060) {
                case 0x00000000:
                    /* ....0001 .1.0.... ........ 1001.... */
                    switch (insn & 0x00a00f00) {
                    case 0x00000000:
                        /* ....0001 0100.... ....0000 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:365 */
                        disas_a32_extract_swp(ctx, &u.f_disas_a3226, insn);
                        if (trans_SWPB(ctx, &u.f_disas_a3226)) return true;
                        return false;
                    case 0x00800c00:
                        /* ....0001 1100.... ....1100 1001.... */
                        disas_a32_extract_stl(ctx, &u.f_ldrex, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0xf:
                            /* ....0001 1100.... 11111100 1001.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:389 */
                            if (trans_STLB(ctx, &u.f_ldrex)) return true;
                            return false;
                        }
                        return false;
                    case 0x00800e00:
                        /* ....0001 1100.... ....1110 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:385 */
                        disas_a32_extract_strex(ctx, &u.f_strex, insn);
                        if (trans_STLEXB(ctx, &u.f_strex)) return true;
                        return false;
                    case 0x00800f00:
                        /* ....0001 1100.... ....1111 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:380 */
                        disas_a32_extract_strex(ctx, &u.f_strex, insn);
                        if (trans_STREXB(ctx, &u.f_strex)) return true;
                        return false;
                    case 0x00a00c00:
                        /* ....0001 1110.... ....1100 1001.... */
                        disas_a32_extract_stl(ctx, &u.f_ldrex, insn);
                        switch ((insn >> 12) & 0xf) {
                        case 0xf:
                            /* ....0001 1110.... 11111100 1001.... */
                            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:390 */
                            if (trans_STLH(ctx, &u.f_ldrex)) return true;
                            return false;
                        }
                        return false;
                    case 0x00a00e00:
                        /* ....0001 1110.... ....1110 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:386 */
                        disas_a32_extract_strex(ctx, &u.f_strex, insn);
                        if (trans_STLEXH(ctx, &u.f_strex)) return true;
                        return false;
                    case 0x00a00f00:
                        /* ....0001 1110.... ....1111 1001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:381 */
                        disas_a32_extract_strex(ctx, &u.f_strex, insn);
                        if (trans_STREXH(ctx, &u.f_strex)) return true;
                        return false;
                    }
                    return false;
                case 0x00000020:
                    /* ....0001 .1.0.... ........ 1011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:311 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
                    return false;
                case 0x00000040:
                    /* ....0001 .1.0.... ........ 1101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:314 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_LDRD_ri_a32(ctx, &u.f_ldst_ri)) return true;
                    return false;
                case 0x00000060:
                    /* ....0001 .1.0.... ........ 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:317 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_STRD_ri_a32(ctx, &u.f_ldst_ri)) return true;
                    return false;
                case 0x00100000:
                    /* ....0001 .1.1.... ........ 1001.... */
                    disas_a32_extract_ldrex(ctx, &u.f_ldrex, insn);
                    switch (insn & 0x00a00f0f) {
                    case 0x00800c0f:
                        /* ....0001 1101.... ....1100 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:403 */
                        if (trans_LDAB(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00800e0f:
                        /* ....0001 1101.... ....1110 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:399 */
                        if (trans_LDAEXB(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00800f0f:
                        /* ....0001 1101.... ....1111 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:394 */
                        if (trans_LDREXB(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00a00c0f:
                        /* ....0001 1111.... ....1100 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:404 */
                        if (trans_LDAH(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00a00e0f:
                        /* ....0001 1111.... ....1110 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:400 */
                        if (trans_LDAEXH(ctx, &u.f_ldrex)) return true;
                        return false;
                    case 0x00a00f0f:
                        /* ....0001 1111.... ....1111 10011111 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:395 */
                        if (trans_LDREXH(ctx, &u.f_ldrex)) return true;
                        return false;
                    }
                    return false;
                case 0x00100020:
                    /* ....0001 .1.1.... ........ 1011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:320 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
                    return false;
                case 0x00100040:
                    /* ....0001 .1.1.... ........ 1101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:323 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
                    return false;
                case 0x00100060:
                    /* ....0001 .1.1.... ........ 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:326 */
                    disas_a32_extract_ldst_ri8_p1w(ctx, &u.f_ldst_ri, insn);
                    if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
                    return false;
                }
                return false;
            }
            return false;
        }
        return false;
    case 0x1:
        /* ....001. ........ ........ ........ */
        switch ((insn >> 21) & 0xf) {
        case 0x0:
            /* ....0010 000..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:120 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_AND_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x1:
            /* ....0010 001..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:121 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_EOR_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x2:
            /* ....0010 010..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:122 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x3:
            /* ....0010 011..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:123 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_RSB_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x4:
            /* ....0010 100..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:124 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x5:
            /* ....0010 101..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:125 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_ADC_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x6:
            /* ....0010 110..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:126 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_SBC_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x7:
            /* ....0010 111..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:127 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_RSC_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0x8:
            /* ....0011 000..... ........ ........ */
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* ....0011 0000.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:80 */
                disas_a32_extract_mov16(ctx, &u.f_ri, insn);
                if (trans_MOVW(ctx, &u.f_ri)) return true;
                return false;
            case 0x1:
                /* ....0011 0001.... ........ ........ */
                disas_a32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
                switch ((insn >> 12) & 0xf) {
                case 0x0:
                    /* ....0011 0001.... 0000.... ........ */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:128 */
                    if (trans_TST_xri(ctx, &u.f_s_rri_rot)) return true;
                    return false;
                }
                return false;
            }
            return false;
        case 0x9:
            /* ....0011 001..... ........ ........ */
            switch (insn & 0x0010f000) {
            case 0x0000f000:
                /* ....0011 0010.... 1111.... ........ */
                if ((insn & 0x000f0000) == 0x00000000) {
                    /* ....0011 00100000 1111.... ........ */
                    if ((insn & 0x000000ff) == 0x00000001) {
                        /* ....0011 00100000 1111.... 00000001 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:188 */
                        disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                        if (trans_YIELD(ctx, &u.f_empty)) return true;
                    }
                    if ((insn & 0x000000ff) == 0x00000002) {
                        /* ....0011 00100000 1111.... 00000010 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:189 */
                        disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                        if (trans_WFE(ctx, &u.f_empty)) return true;
                    }
                    if ((insn & 0x000000ff) == 0x00000003) {
                        /* ....0011 00100000 1111.... 00000011 */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:190 */
                        disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                        if (trans_WFI(ctx, &u.f_empty)) return true;
                    }
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:198 */
                    disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                    if (trans_NOP(ctx, &u.f_empty)) return true;
                }
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:201 */
                disas_a32_extract_msr_i(ctx, &u.f_msr_i, insn);
                u.f_msr_i.r = 0;
                if (trans_MSR_imm(ctx, &u.f_msr_i)) return true;
                return false;
            case 0x00100000:
                /* ....0011 0011.... 0000.... ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:129 */
                disas_a32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
                if (trans_TEQ_xri(ctx, &u.f_s_rri_rot)) return true;
                return false;
            }
            return false;
        case 0xa:
            /* ....0011 010..... ........ ........ */
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* ....0011 0100.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:81 */
                disas_a32_extract_mov16(ctx, &u.f_ri, insn);
                if (trans_MOVT(ctx, &u.f_ri)) return true;
                return false;
            case 0x1:
                /* ....0011 0101.... ........ ........ */
                disas_a32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
                switch ((insn >> 12) & 0xf) {
                case 0x0:
                    /* ....0011 0101.... 0000.... ........ */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:130 */
                    if (trans_CMP_xri(ctx, &u.f_s_rri_rot)) return true;
                    return false;
                }
                return false;
            }
            return false;
        case 0xb:
            /* ....0011 011..... ........ ........ */
            switch (insn & 0x0010f000) {
            case 0x0000f000:
                /* ....0011 0110.... 1111.... ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:203 */
                disas_a32_extract_msr_i(ctx, &u.f_msr_i, insn);
                u.f_msr_i.r = 1;
                if (trans_MSR_imm(ctx, &u.f_msr_i)) return true;
                return false;
            case 0x00100000:
                /* ....0011 0111.... 0000.... ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:131 */
                disas_a32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
                if (trans_CMN_xri(ctx, &u.f_s_rri_rot)) return true;
                return false;
            }
            return false;
        case 0xc:
            /* ....0011 100..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:132 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_ORR_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0xd:
            /* ....0011 101..... ........ ........ */
            disas_a32_extract_s_rxi_rot(ctx, &u.f_s_rri_rot, insn);
            switch ((insn >> 16) & 0xf) {
            case 0x0:
                /* ....0011 101.0000 ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:133 */
                if (trans_MOV_rxi(ctx, &u.f_s_rri_rot)) return true;
                return false;
            }
            return false;
        case 0xe:
            /* ....0011 110..... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:134 */
            disas_a32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
            if (trans_BIC_rri(ctx, &u.f_s_rri_rot)) return true;
            return false;
        case 0xf:
            /* ....0011 111..... ........ ........ */
            disas_a32_extract_s_rxi_rot(ctx, &u.f_s_rri_rot, insn);
            switch ((insn >> 16) & 0xf) {
            case 0x0:
                /* ....0011 111.0000 ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:135 */
                if (trans_MVN_rxi(ctx, &u.f_s_rri_rot)) return true;
                return false;
            }
            return false;
        }
        return false;
    case 0x2:
        /* ....010. ........ ........ ........ */
        switch (insn & 0x01500000) {
        case 0x00000000:
            /* ....0100 .0.0.... ........ ........ */
            switch ((insn >> 21) & 0x1) {
            case 0x0:
                /* ....0100 .000.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:344 */
                disas_a32_extract_ldst_ri12_pw0(ctx, &u.f_ldst_ri, insn);
                if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            case 0x1:
                /* ....0100 .010.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:355 */
                disas_a32_extract_ldst_ri12_p0w1(ctx, &u.f_ldst_ri, insn);
                if (trans_STRT_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            }
            return false;
        case 0x00100000:
            /* ....0100 .0.1.... ........ ........ */
            switch ((insn >> 21) & 0x1) {
            case 0x0:
                /* ....0100 .001.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:349 */
                disas_a32_extract_ldst_ri12_pw0(ctx, &u.f_ldst_ri, insn);
                if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            case 0x1:
                /* ....0100 .011.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:357 */
                disas_a32_extract_ldst_ri12_p0w1(ctx, &u.f_ldst_ri, insn);
                if (trans_LDRT_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            }
            return false;
        case 0x00400000:
            /* ....0100 .1.0.... ........ ........ */
            switch ((insn >> 21) & 0x1) {
            case 0x0:
                /* ....0100 .100.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:346 */
                disas_a32_extract_ldst_ri12_pw0(ctx, &u.f_ldst_ri, insn);
                if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            case 0x1:
                /* ....0100 .110.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:356 */
                disas_a32_extract_ldst_ri12_p0w1(ctx, &u.f_ldst_ri, insn);
                if (trans_STRBT_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            }
            return false;
        case 0x00500000:
            /* ....0100 .1.1.... ........ ........ */
            switch ((insn >> 21) & 0x1) {
            case 0x0:
                /* ....0100 .101.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:351 */
                disas_a32_extract_ldst_ri12_pw0(ctx, &u.f_ldst_ri, insn);
                if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            case 0x1:
                /* ....0100 .111.... ........ ........ */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:358 */
                disas_a32_extract_ldst_ri12_p0w1(ctx, &u.f_ldst_ri, insn);
                if (trans_LDRBT_ri(ctx, &u.f_ldst_ri)) return true;
                return false;
            }
            return false;
        case 0x01000000:
            /* ....0101 .0.0.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:343 */
            disas_a32_extract_ldst_ri12_p1w(ctx, &u.f_ldst_ri, insn);
            if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
            return false;
        case 0x01100000:
            /* ....0101 .0.1.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:348 */
            disas_a32_extract_ldst_ri12_p1w(ctx, &u.f_ldst_ri, insn);
            if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
            return false;
        case 0x01400000:
            /* ....0101 .1.0.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:345 */
            disas_a32_extract_ldst_ri12_p1w(ctx, &u.f_ldst_ri, insn);
            if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
            return false;
        case 0x01500000:
            /* ....0101 .1.1.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:350 */
            disas_a32_extract_ldst_ri12_p1w(ctx, &u.f_ldst_ri, insn);
            if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
            return false;
        }
        return false;
    case 0x3:
        /* ....011. ........ ........ ........ */
        switch (insn & 0x01400010) {
        case 0x00000000:
            /* ....0110 .0...... ........ ...0.... */
            switch ((insn >> 20) & 0x3) {
            case 0x0:
                /* ....0110 .000.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:284 */
                disas_a32_extract_ldst_rs_pw0(ctx, &u.f_ldst_rr, insn);
                if (trans_STR_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x1:
                /* ....0110 .001.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:289 */
                disas_a32_extract_ldst_rs_pw0(ctx, &u.f_ldst_rr, insn);
                if (trans_LDR_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x2:
                /* ....0110 .010.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:297 */
                disas_a32_extract_ldst_rs_p0w1(ctx, &u.f_ldst_rr, insn);
                if (trans_STRT_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x3:
                /* ....0110 .011.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:299 */
                disas_a32_extract_ldst_rs_p0w1(ctx, &u.f_ldst_rr, insn);
                if (trans_LDRT_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            }
            return false;
        case 0x00000010:
            /* ....0110 .0...... ........ ...1.... */
            switch (insn & 0x00a00020) {
            case 0x00000000:
                /* ....0110 000..... ........ ..01.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00100f00:
                    /* ....0110 0001.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:426 */
                    if (trans_SADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0001.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:428 */
                    if (trans_SSAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f80:
                    /* ....0110 0001.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:430 */
                    if (trans_SADD8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00000020:
                /* ....0110 000..... ........ ..11.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00100f00:
                    /* ....0110 0001.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:427 */
                    if (trans_SASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0001.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:429 */
                    if (trans_SSUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100fc0:
                    /* ....0110 0001.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:431 */
                    if (trans_SSUB8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00200000:
                /* ....0110 001..... ........ ..01.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00000f00:
                    /* ....0110 0010.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:433 */
                    if (trans_QADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f40:
                    /* ....0110 0010.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:435 */
                    if (trans_QSAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f80:
                    /* ....0110 0010.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:437 */
                    if (trans_QADD8(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f00:
                    /* ....0110 0011.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:440 */
                    if (trans_SHADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0011.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:442 */
                    if (trans_SHSAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f80:
                    /* ....0110 0011.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:444 */
                    if (trans_SHADD8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00200020:
                /* ....0110 001..... ........ ..11.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00000f00:
                    /* ....0110 0010.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:434 */
                    if (trans_QASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f40:
                    /* ....0110 0010.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:436 */
                    if (trans_QSUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000fc0:
                    /* ....0110 0010.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:438 */
                    if (trans_QSUB8(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f00:
                    /* ....0110 0011.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:441 */
                    if (trans_SHASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0011.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:443 */
                    if (trans_SHSUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100fc0:
                    /* ....0110 0011.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:445 */
                    if (trans_SHSUB8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00800000:
                /* ....0110 100..... ........ ..01.... */
                disas_a32_extract_disas_a32_Fmt_43(ctx, &u.f_pkh, insn);
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* ....0110 1000.... ........ ..01.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:470 */
                    if (trans_PKH(ctx, &u.f_pkh)) return true;
                    return false;
                }
                return false;
            case 0x00800020:
                /* ....0110 100..... ........ ..11.... */
                switch (insn & 0x001003c0) {
                case 0x00000040:
                    /* ....0110 1000.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:484 */
                    disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                    if (trans_SXTAB16(ctx, &u.f_rrr_rot)) return true;
                    return false;
                case 0x00000380:
                    /* ....0110 1000.... ......11 1011.... */
                    disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                    switch ((insn >> 10) & 0x3) {
                    case 0x3:
                        /* ....0110 1000.... ....1111 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:491 */
                        if (trans_SEL(ctx, &u.f_rrr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00a00000:
                /* ....0110 101..... ........ ..01.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:476 */
                disas_a32_extract_sat(ctx, &u.f_sat, insn);
                if (trans_SSAT(ctx, &u.f_sat)) return true;
                return false;
            case 0x00a00020:
                /* ....0110 101..... ........ ..11.... */
                switch (insn & 0x001003c0) {
                case 0x00000040:
                    /* ....0110 1010.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:485 */
                    disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                    if (trans_SXTAB(ctx, &u.f_rrr_rot)) return true;
                    return false;
                case 0x00000300:
                    /* ....0110 1010.... ......11 0011.... */
                    disas_a32_extract_sat16(ctx, &u.f_sat, insn);
                    switch ((insn >> 10) & 0x3) {
                    case 0x3:
                        /* ....0110 1010.... ....1111 0011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:479 */
                        if (trans_SSAT16(ctx, &u.f_sat)) return true;
                        return false;
                    }
                    return false;
                case 0x00100040:
                    /* ....0110 1011.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:486 */
                    disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                    if (trans_SXTAH(ctx, &u.f_rrr_rot)) return true;
                    return false;
                case 0x00100300:
                    /* ....0110 1011.... ......11 0011.... */
                    disas_a32_extract_rdm(ctx, &u.f_rr, insn);
                    switch (insn & 0x000f0c00) {
                    case 0x000f0c00:
                        /* ....0110 10111111 ....1111 0011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:492 */
                        if (trans_REV(ctx, &u.f_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x00100380:
                    /* ....0110 1011.... ......11 1011.... */
                    disas_a32_extract_rdm(ctx, &u.f_rr, insn);
                    switch (insn & 0x000f0c00) {
                    case 0x000f0c00:
                        /* ....0110 10111111 ....1111 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:493 */
                        if (trans_REV16(ctx, &u.f_rr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            }
            return false;
        case 0x00400000:
            /* ....0110 .1...... ........ ...0.... */
            switch ((insn >> 20) & 0x3) {
            case 0x0:
                /* ....0110 .100.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:286 */
                disas_a32_extract_ldst_rs_pw0(ctx, &u.f_ldst_rr, insn);
                if (trans_STRB_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x1:
                /* ....0110 .101.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:291 */
                disas_a32_extract_ldst_rs_pw0(ctx, &u.f_ldst_rr, insn);
                if (trans_LDRB_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x2:
                /* ....0110 .110.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:298 */
                disas_a32_extract_ldst_rs_p0w1(ctx, &u.f_ldst_rr, insn);
                if (trans_STRBT_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x3:
                /* ....0110 .111.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:300 */
                disas_a32_extract_ldst_rs_p0w1(ctx, &u.f_ldst_rr, insn);
                if (trans_LDRBT_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            }
            return false;
        case 0x00400010:
            /* ....0110 .1...... ........ ...1.... */
            switch (insn & 0x00a00020) {
            case 0x00000000:
                /* ....0110 010..... ........ ..01.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00100f00:
                    /* ....0110 0101.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:447 */
                    if (trans_UADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0101.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:449 */
                    if (trans_USAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f80:
                    /* ....0110 0101.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:451 */
                    if (trans_UADD8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00000020:
                /* ....0110 010..... ........ ..11.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00100f00:
                    /* ....0110 0101.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:448 */
                    if (trans_UASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0101.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:450 */
                    if (trans_USUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100fc0:
                    /* ....0110 0101.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:452 */
                    if (trans_USUB8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00200000:
                /* ....0110 011..... ........ ..01.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00000f00:
                    /* ....0110 0110.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:454 */
                    if (trans_UQADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f40:
                    /* ....0110 0110.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:456 */
                    if (trans_UQSAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f80:
                    /* ....0110 0110.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:458 */
                    if (trans_UQADD8(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f00:
                    /* ....0110 0111.... ....1111 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:461 */
                    if (trans_UHADD16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0111.... ....1111 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:463 */
                    if (trans_UHSAX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f80:
                    /* ....0110 0111.... ....1111 1001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:465 */
                    if (trans_UHADD8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00200020:
                /* ....0110 011..... ........ ..11.... */
                disas_a32_extract_rndm(ctx, &u.f_rrr, insn);
                switch (insn & 0x00100fc0) {
                case 0x00000f00:
                    /* ....0110 0110.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:455 */
                    if (trans_UQASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000f40:
                    /* ....0110 0110.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:457 */
                    if (trans_UQSUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00000fc0:
                    /* ....0110 0110.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:459 */
                    if (trans_UQSUB8(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f00:
                    /* ....0110 0111.... ....1111 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:462 */
                    if (trans_UHASX(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100f40:
                    /* ....0110 0111.... ....1111 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:464 */
                    if (trans_UHSUB16(ctx, &u.f_rrr)) return true;
                    return false;
                case 0x00100fc0:
                    /* ....0110 0111.... ....1111 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:466 */
                    if (trans_UHSUB8(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00800020:
                /* ....0110 110..... ........ ..11.... */
                disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                switch (insn & 0x001003c0) {
                case 0x00000040:
                    /* ....0110 1100.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:487 */
                    if (trans_UXTAB16(ctx, &u.f_rrr_rot)) return true;
                    return false;
                }
                return false;
            case 0x00a00000:
                /* ....0110 111..... ........ ..01.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:477 */
                disas_a32_extract_sat(ctx, &u.f_sat, insn);
                if (trans_USAT(ctx, &u.f_sat)) return true;
                return false;
            case 0x00a00020:
                /* ....0110 111..... ........ ..11.... */
                switch (insn & 0x001003c0) {
                case 0x00000040:
                    /* ....0110 1110.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:488 */
                    disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                    if (trans_UXTAB(ctx, &u.f_rrr_rot)) return true;
                    return false;
                case 0x00000300:
                    /* ....0110 1110.... ......11 0011.... */
                    disas_a32_extract_sat16(ctx, &u.f_sat, insn);
                    switch ((insn >> 10) & 0x3) {
                    case 0x3:
                        /* ....0110 1110.... ....1111 0011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:480 */
                        if (trans_USAT16(ctx, &u.f_sat)) return true;
                        return false;
                    }
                    return false;
                case 0x00100040:
                    /* ....0110 1111.... ......00 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:489 */
                    disas_a32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
                    if (trans_UXTAH(ctx, &u.f_rrr_rot)) return true;
                    return false;
                case 0x00100300:
                    /* ....0110 1111.... ......11 0011.... */
                    disas_a32_extract_rdm(ctx, &u.f_rr, insn);
                    switch (insn & 0x000f0c00) {
                    case 0x000f0c00:
                        /* ....0110 11111111 ....1111 0011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:495 */
                        if (trans_RBIT(ctx, &u.f_rr)) return true;
                        return false;
                    }
                    return false;
                case 0x00100380:
                    /* ....0110 1111.... ......11 1011.... */
                    disas_a32_extract_rdm(ctx, &u.f_rr, insn);
                    switch (insn & 0x000f0c00) {
                    case 0x000f0c00:
                        /* ....0110 11111111 ....1111 1011.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:494 */
                        if (trans_REVSH(ctx, &u.f_rr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            }
            return false;
        case 0x01000000:
            /* ....0111 .0...... ........ ...0.... */
            disas_a32_extract_ldst_rs_p1w(ctx, &u.f_ldst_rr, insn);
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* ....0111 .0.0.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:285 */
                if (trans_STR_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x1:
                /* ....0111 .0.1.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:290 */
                if (trans_LDR_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            }
            return false;
        case 0x01000010:
            /* ....0111 .0...... ........ ...1.... */
            switch (insn & 0x00a00060) {
            case 0x00000000:
                /* ....0111 000..... ........ .001.... */
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0000.... ........ 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:501 */
                    disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                    if (trans_SMLAD(ctx, &u.f_rrrr)) return true;
                    return false;
                case 0x00100000:
                    /* ....0111 0001.... ........ 0001.... */
                    disas_a32_extract_rdmn(ctx, &u.f_rrr, insn);
                    switch ((insn >> 12) & 0xf) {
                    case 0xf:
                        /* ....0111 0001.... 1111.... 0001.... */
                        /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:506 */
                        if (trans_SDIV(ctx, &u.f_rrr)) return true;
                        return false;
                    }
                    return false;
                }
                return false;
            case 0x00000020:
                /* ....0111 000..... ........ .011.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0000.... ........ 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:502 */
                    if (trans_SMLADX(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00000040:
                /* ....0111 000..... ........ .101.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0000.... ........ 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:503 */
                    if (trans_SMLSD(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00000060:
                /* ....0111 000..... ........ .111.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0000.... ........ 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:504 */
                    if (trans_SMLSDX(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00200000:
                /* ....0111 001..... ........ .001.... */
                disas_a32_extract_rdmn(ctx, &u.f_rrr, insn);
                switch (insn & 0x0010f080) {
                case 0x0010f000:
                    /* ....0111 0011.... 1111.... 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:507 */
                    if (trans_UDIV(ctx, &u.f_rrr)) return true;
                    return false;
                }
                return false;
            case 0x00800000:
                /* ....0111 100..... ........ .001.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 1000.... ........ 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:409 */
                    if (trans_USADA8(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00a00040:
                /* ....0111 101..... ........ .101.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:414 */
                disas_a32_extract_bfx(ctx, &u.f_bfx, insn);
                if (trans_SBFX(ctx, &u.f_bfx)) return true;
                return false;
            }
            return false;
        case 0x01400000:
            /* ....0111 .1...... ........ ...0.... */
            disas_a32_extract_ldst_rs_p1w(ctx, &u.f_ldst_rr, insn);
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* ....0111 .1.0.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:287 */
                if (trans_STRB_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            case 0x1:
                /* ....0111 .1.1.... ........ ...0.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:292 */
                if (trans_LDRB_rr(ctx, &u.f_ldst_rr)) return true;
                return false;
            }
            return false;
        case 0x01400010:
            /* ....0111 .1...... ........ ...1.... */
            switch (insn & 0x00a00060) {
            case 0x00000000:
                /* ....0111 010..... ........ .001.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0100.... ........ 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:509 */
                    if (trans_SMLALD(ctx, &u.f_rrrr)) return true;
                    return false;
                case 0x00100000:
                    /* ....0111 0101.... ........ 0001.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:514 */
                    if (trans_SMMLA(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00000020:
                /* ....0111 010..... ........ .011.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0100.... ........ 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:510 */
                    if (trans_SMLALDX(ctx, &u.f_rrrr)) return true;
                    return false;
                case 0x00100000:
                    /* ....0111 0101.... ........ 0011.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:515 */
                    if (trans_SMMLAR(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00000040:
                /* ....0111 010..... ........ .101.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0100.... ........ 0101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:511 */
                    if (trans_SMLSLD(ctx, &u.f_rrrr)) return true;
                    return false;
                case 0x00100080:
                    /* ....0111 0101.... ........ 1101.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:516 */
                    if (trans_SMMLS(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00000060:
                /* ....0111 010..... ........ .111.... */
                disas_a32_extract_rdamn(ctx, &u.f_rrrr, insn);
                switch (insn & 0x00100080) {
                case 0x00000000:
                    /* ....0111 0100.... ........ 0111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:512 */
                    if (trans_SMLSLDX(ctx, &u.f_rrrr)) return true;
                    return false;
                case 0x00100080:
                    /* ....0111 0101.... ........ 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:517 */
                    if (trans_SMMLSR(ctx, &u.f_rrrr)) return true;
                    return false;
                }
                return false;
            case 0x00800000:
                /* ....0111 110..... ........ .001.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:418 */
                disas_a32_extract_disas_a32_Fmt_42(ctx, &u.f_bfi, insn);
                if (trans_BFCI(ctx, &u.f_bfi)) return true;
                return false;
            case 0x00a00040:
                /* ....0111 111..... ........ .101.... */
                /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:415 */
                disas_a32_extract_bfx(ctx, &u.f_bfx, insn);
                if (trans_UBFX(ctx, &u.f_bfx)) return true;
                return false;
            case 0x00a00060:
                /* ....0111 111..... ........ .111.... */
                disas_a32_extract_disas_a32_Fmt_16(ctx, &u.f_empty, insn);
                switch (insn & 0xf0100080) {
                case 0xe0100080:
                    /* 11100111 1111.... ........ 1111.... */
                    /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:422 */
                    if (trans_UDF(ctx, &u.f_empty)) return true;
                    return false;
                }
                return false;
            }
            return false;
        }
        return false;
    case 0x4:
        /* ....100. ........ ........ ........ */
        disas_a32_extract_disas_a32_Fmt_48(ctx, &u.f_ldst_block, insn);
        switch ((insn >> 20) & 0x1) {
        case 0x0:
            /* ....100. ...0.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:521 */
            if (trans_STM(ctx, &u.f_ldst_block)) return true;
            return false;
        case 0x1:
            /* ....100. ...1.... ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:522 */
            if (trans_LDM_a32(ctx, &u.f_ldst_block)) return true;
            return false;
        }
        return false;
    case 0x5:
        /* ....101. ........ ........ ........ */
        disas_a32_extract_branch(ctx, &u.f_i, insn);
        switch ((insn >> 24) & 0x1) {
        case 0x0:
            /* ....1010 ........ ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:529 */
            if (trans_B(ctx, &u.f_i)) return true;
            return false;
        case 0x1:
            /* ....1011 ........ ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:530 */
            if (trans_BL(ctx, &u.f_i)) return true;
            return false;
        }
        return false;
    case 0x7:
        /* ....111. ........ ........ ........ */
        disas_a32_extract_disas_a32_Fmt_50(ctx, &u.f_i, insn);
        switch ((insn >> 24) & 0x1) {
        case 0x1:
            /* ....1111 ........ ........ ........ */
            /* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/a32.decode:534 */
            if (trans_SVC(ctx, &u.f_i)) return true;
            return false;
        }
        return false;
    }
    return false;
}
