/* This file is autogenerated by scripts/decodetree.py.  */

#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
# pragma GCC diagnostic push
# pragma GCC diagnostic ignored "-Wredundant-decls"
# ifdef __clang__
#  pragma GCC diagnostic ignored "-Wtypedef-redefinition"
# endif
#endif

typedef arg_empty arg_illegal;
static bool trans_illegal(DisasContext *ctx, arg_illegal *a);
typedef arg_i arg_addi;
static bool trans_addi(DisasContext *ctx, arg_addi *a);
typedef arg_i arg_fld;
static bool trans_fld(DisasContext *ctx, arg_fld *a);
typedef arg_i arg_lw;
static bool trans_lw(DisasContext *ctx, arg_lw *a);
typedef arg_s arg_fsd;
static bool trans_fsd(DisasContext *ctx, arg_fsd *a);
typedef arg_s arg_sw;
static bool trans_sw(DisasContext *ctx, arg_sw *a);
typedef arg_u arg_lui;
static bool trans_lui(DisasContext *ctx, arg_lui *a);
typedef arg_shift arg_srli;
static bool trans_srli(DisasContext *ctx, arg_srli *a);
typedef arg_shift arg_srai;
static bool trans_srai(DisasContext *ctx, arg_srai *a);
typedef arg_i arg_andi;
static bool trans_andi(DisasContext *ctx, arg_andi *a);
typedef arg_r arg_sub;
static bool trans_sub(DisasContext *ctx, arg_sub *a);
typedef arg_r arg_xor;
static bool trans_xor(DisasContext *ctx, arg_xor *a);
typedef arg_r arg_or;
static bool trans_or(DisasContext *ctx, arg_or *a);
typedef arg_r arg_and;
static bool trans_and(DisasContext *ctx, arg_and *a);
typedef arg_j arg_jal;
static bool trans_jal(DisasContext *ctx, arg_jal *a);
typedef arg_b arg_beq;
static bool trans_beq(DisasContext *ctx, arg_beq *a);
typedef arg_b arg_bne;
static bool trans_bne(DisasContext *ctx, arg_bne *a);
typedef arg_shift arg_slli;
static bool trans_slli(DisasContext *ctx, arg_slli *a);
typedef arg_i arg_jalr;
static bool trans_jalr(DisasContext *ctx, arg_jalr *a);
typedef arg_empty arg_ebreak;
static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a);
typedef arg_r arg_add;
static bool trans_add(DisasContext *ctx, arg_add *a);
typedef arg_i arg_ld;
static bool trans_ld(DisasContext *ctx, arg_ld *a);
typedef arg_s arg_sd;
static bool trans_sd(DisasContext *ctx, arg_sd *a);
typedef arg_i arg_addiw;
static bool trans_addiw(DisasContext *ctx, arg_addiw *a);
typedef arg_r arg_subw;
static bool trans_subw(DisasContext *ctx, arg_subw *a);
typedef arg_r arg_addw;
static bool trans_addw(DisasContext *ctx, arg_addw *a);

#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
# pragma GCC diagnostic pop
#endif

static void decode_insn16_extract_c_addi16sp(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_4(ctx, deposit32(deposit32(deposit32(deposit32(extract32(insn, 6, 1), 1, 31, extract32(insn, 2, 1)), 2, 30, extract32(insn, 5, 1)), 3, 29, extract32(insn, 3, 2)), 5, 27, sextract32(insn, 12, 1)));
    a->rs1 = 2;
    a->rd = 2;
}

static void decode_insn16_extract_c_addi4spn(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_2(ctx, deposit32(deposit32(deposit32(extract32(insn, 6, 1), 1, 31, extract32(insn, 5, 1)), 2, 30, extract32(insn, 11, 2)), 4, 28, extract32(insn, 7, 4)));
    a->rs1 = 2;
    a->rd = ex_rvc_register(ctx, extract32(insn, 2, 3));
}

static void decode_insn16_extract_c_andi(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = deposit32(extract32(insn, 2, 5), 5, 27, sextract32(insn, 12, 1));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rd = ex_rvc_register(ctx, extract32(insn, 7, 3));
}

static void decode_insn16_extract_c_jalr(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = 0;
    a->rs1 = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_ldsp(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_3(ctx, deposit32(deposit32(extract32(insn, 5, 2), 2, 30, extract32(insn, 12, 1)), 3, 29, extract32(insn, 2, 3)));
    a->rs1 = 2;
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_li(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = deposit32(extract32(insn, 2, 5), 5, 27, sextract32(insn, 12, 1));
    a->rs1 = 0;
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_lui(DisasContext *ctx, arg_u *a, uint16_t insn)
{
    a->imm = ex_shift_12(ctx, deposit32(extract32(insn, 2, 5), 5, 27, sextract32(insn, 12, 1)));
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_lwsp(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_2(ctx, deposit32(deposit32(extract32(insn, 4, 3), 3, 29, extract32(insn, 12, 1)), 4, 28, extract32(insn, 2, 2)));
    a->rs1 = 2;
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_mv(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = 0;
    a->rs1 = extract32(insn, 2, 5);
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_c_sdsp(DisasContext *ctx, arg_s *a, uint16_t insn)
{
    a->imm = ex_shift_3(ctx, deposit32(extract32(insn, 10, 3), 3, 29, extract32(insn, 7, 3)));
    a->rs1 = 2;
    a->rs2 = extract32(insn, 2, 5);
}

static void decode_insn16_extract_c_shift(DisasContext *ctx, arg_shift *a, uint16_t insn)
{
    a->rd = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->shamt = ex_rvc_shifti(ctx, deposit32(extract32(insn, 2, 5), 5, 27, extract32(insn, 12, 1)));
}

static void decode_insn16_extract_c_shift2(DisasContext *ctx, arg_shift *a, uint16_t insn)
{
    a->rd = extract32(insn, 7, 5);
    a->rs1 = extract32(insn, 7, 5);
    a->shamt = ex_rvc_shifti(ctx, deposit32(extract32(insn, 2, 5), 5, 27, extract32(insn, 12, 1)));
}

static void decode_insn16_extract_c_swsp(DisasContext *ctx, arg_s *a, uint16_t insn)
{
    a->imm = ex_shift_2(ctx, deposit32(extract32(insn, 9, 4), 4, 28, extract32(insn, 7, 2)));
    a->rs1 = 2;
    a->rs2 = extract32(insn, 2, 5);
}

static void decode_insn16_extract_cb_z(DisasContext *ctx, arg_b *a, uint16_t insn)
{
    a->imm = ex_shift_1(ctx, deposit32(deposit32(deposit32(deposit32(extract32(insn, 3, 2), 2, 30, extract32(insn, 10, 2)), 4, 28, extract32(insn, 2, 1)), 5, 27, extract32(insn, 5, 2)), 7, 25, sextract32(insn, 12, 1)));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rs2 = 0;
}

static void decode_insn16_extract_ci(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = deposit32(extract32(insn, 2, 5), 5, 27, sextract32(insn, 12, 1));
    a->rs1 = extract32(insn, 7, 5);
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_cj(DisasContext *ctx, arg_j *a, uint16_t insn)
{
    a->imm = ex_shift_1(ctx, deposit32(deposit32(deposit32(deposit32(deposit32(deposit32(deposit32(extract32(insn, 3, 3), 3, 29, extract32(insn, 11, 1)), 4, 28, extract32(insn, 2, 1)), 5, 27, extract32(insn, 7, 1)), 6, 26, extract32(insn, 6, 1)), 7, 25, extract32(insn, 9, 2)), 9, 23, extract32(insn, 8, 1)), 10, 22, sextract32(insn, 12, 1)));
}

static void decode_insn16_extract_cl_d(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_3(ctx, deposit32(extract32(insn, 10, 3), 3, 29, extract32(insn, 5, 2)));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rd = ex_rvc_register(ctx, extract32(insn, 2, 3));
}

static void decode_insn16_extract_cl_w(DisasContext *ctx, arg_i *a, uint16_t insn)
{
    a->imm = ex_shift_2(ctx, deposit32(deposit32(extract32(insn, 6, 1), 1, 31, extract32(insn, 10, 3)), 4, 28, extract32(insn, 5, 1)));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rd = ex_rvc_register(ctx, extract32(insn, 2, 3));
}

static void decode_insn16_extract_cr(DisasContext *ctx, arg_r *a, uint16_t insn)
{
    a->rs2 = extract32(insn, 2, 5);
    a->rs1 = extract32(insn, 7, 5);
    a->rd = extract32(insn, 7, 5);
}

static void decode_insn16_extract_cs_2(DisasContext *ctx, arg_r *a, uint16_t insn)
{
    a->rs2 = ex_rvc_register(ctx, extract32(insn, 2, 3));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rd = ex_rvc_register(ctx, extract32(insn, 7, 3));
}

static void decode_insn16_extract_cs_d(DisasContext *ctx, arg_s *a, uint16_t insn)
{
    a->imm = ex_shift_3(ctx, deposit32(extract32(insn, 10, 3), 3, 29, extract32(insn, 5, 2)));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rs2 = ex_rvc_register(ctx, extract32(insn, 2, 3));
}

static void decode_insn16_extract_cs_w(DisasContext *ctx, arg_s *a, uint16_t insn)
{
    a->imm = ex_shift_2(ctx, deposit32(deposit32(extract32(insn, 6, 1), 1, 31, extract32(insn, 10, 3)), 4, 28, extract32(insn, 5, 1)));
    a->rs1 = ex_rvc_register(ctx, extract32(insn, 7, 3));
    a->rs2 = ex_rvc_register(ctx, extract32(insn, 2, 3));
}

static void decode_insn16_extract_decode_insn16_Fmt_22(DisasContext *ctx, arg_empty *a, uint16_t insn)
{
}

static bool decode_insn16(DisasContext *ctx, uint16_t insn)
{
    union {
        arg_b f_b;
        arg_empty f_empty;
        arg_i f_i;
        arg_j f_j;
        arg_r f_r;
        arg_s f_s;
        arg_shift f_shift;
        arg_u f_u;
    } u;

    switch (insn & 0x0000e003) {
    case 0x00000000:
        /* 000..... ......00 */
        if ((insn & 0x00001fe0) == 0x00000000) {
            /* 00000000 000...00 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:87 */
            decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
            ctx->invalid = true;
            if (trans_illegal(ctx, &u.f_empty)) return true;
        }
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:88 */
        decode_insn16_extract_c_addi4spn(ctx, &u.f_i, insn);
        if (trans_addi(ctx, &u.f_i)) return true;
        return false;
    case 0x00000001:
        /* 000..... ......01 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:96 */
        decode_insn16_extract_ci(ctx, &u.f_i, insn);
        if (trans_addi(ctx, &u.f_i)) return true;
        return false;
    case 0x00000002:
        /* 000..... ......10 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:115 */
        decode_insn16_extract_c_shift2(ctx, &u.f_shift, insn);
        if (trans_slli(ctx, &u.f_shift)) return true;
        return false;
    case 0x00002000:
        /* 001..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:90 */
        decode_insn16_extract_cl_d(ctx, &u.f_i, insn);
        if (trans_fld(ctx, &u.f_i)) return true;
        return false;
    case 0x00002001:
        /* 001..... ......01 */
        if ((insn & 0x00000f80) == 0x00000000) {
            /* 001.0000 0.....01 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:25 */
            decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
            if (trans_illegal(ctx, &u.f_empty)) return true;
        }
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:26 */
        decode_insn16_extract_ci(ctx, &u.f_i, insn);
        if (trans_addiw(ctx, &u.f_i)) return true;
        return false;
    case 0x00002002:
        /* 001..... ......10 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:116 */
        decode_insn16_extract_c_ldsp(ctx, &u.f_i, insn);
        if (trans_fld(ctx, &u.f_i)) return true;
        return false;
    case 0x00004000:
        /* 010..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:91 */
        decode_insn16_extract_cl_w(ctx, &u.f_i, insn);
        if (trans_lw(ctx, &u.f_i)) return true;
        return false;
    case 0x00004001:
        /* 010..... ......01 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:97 */
        decode_insn16_extract_c_li(ctx, &u.f_i, insn);
        if (trans_addi(ctx, &u.f_i)) return true;
        return false;
    case 0x00004002:
        /* 010..... ......10 */
        if ((insn & 0x00000f80) == 0x00000000) {
            /* 010.0000 0.....10 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:118 */
            decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
            if (trans_illegal(ctx, &u.f_empty)) return true;
        }
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:119 */
        decode_insn16_extract_c_lwsp(ctx, &u.f_i, insn);
        if (trans_lw(ctx, &u.f_i)) return true;
        return false;
    case 0x00006000:
        /* 011..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:20 */
        decode_insn16_extract_cl_d(ctx, &u.f_i, insn);
        if (trans_ld(ctx, &u.f_i)) return true;
        return false;
    case 0x00006001:
        /* 011..... ......01 */
        if ((insn & 0x0000107c) == 0x00000000) {
            /* 0110.... .0000001 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:99 */
            decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
            if (trans_illegal(ctx, &u.f_empty)) return true;
        }
        if ((insn & 0x00000f80) == 0x00000100) {
            /* 011.0001 0.....01 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:100 */
            decode_insn16_extract_c_addi16sp(ctx, &u.f_i, insn);
            if (trans_addi(ctx, &u.f_i)) return true;
        }
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:101 */
        decode_insn16_extract_c_lui(ctx, &u.f_u, insn);
        if (trans_lui(ctx, &u.f_u)) return true;
        return false;
    case 0x00006002:
        /* 011..... ......10 */
        if ((insn & 0x00000f80) == 0x00000000) {
            /* 011.0000 0.....10 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:33 */
            decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
            if (trans_illegal(ctx, &u.f_empty)) return true;
        }
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:34 */
        decode_insn16_extract_c_ldsp(ctx, &u.f_i, insn);
        if (trans_ld(ctx, &u.f_i)) return true;
        return false;
    case 0x00008001:
        /* 100..... ......01 */
        switch ((insn >> 10) & 0x3) {
        case 0x0:
            /* 100.00.. ......01 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:103 */
            decode_insn16_extract_c_shift(ctx, &u.f_shift, insn);
            if (trans_srli(ctx, &u.f_shift)) return true;
            return false;
        case 0x1:
            /* 100.01.. ......01 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:104 */
            decode_insn16_extract_c_shift(ctx, &u.f_shift, insn);
            if (trans_srai(ctx, &u.f_shift)) return true;
            return false;
        case 0x2:
            /* 100.10.. ......01 */
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:105 */
            decode_insn16_extract_c_andi(ctx, &u.f_i, insn);
            if (trans_andi(ctx, &u.f_i)) return true;
            return false;
        case 0x3:
            /* 100.11.. ......01 */
            decode_insn16_extract_cs_2(ctx, &u.f_r, insn);
            switch (insn & 0x00001060) {
            case 0x00000000:
                /* 100011.. .00...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:106 */
                if (trans_sub(ctx, &u.f_r)) return true;
                return false;
            case 0x00000020:
                /* 100011.. .01...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:107 */
                if (trans_xor(ctx, &u.f_r)) return true;
                return false;
            case 0x00000040:
                /* 100011.. .10...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:108 */
                if (trans_or(ctx, &u.f_r)) return true;
                return false;
            case 0x00000060:
                /* 100011.. .11...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:109 */
                if (trans_and(ctx, &u.f_r)) return true;
                return false;
            case 0x00001000:
                /* 100111.. .00...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:28 */
                if (trans_subw(ctx, &u.f_r)) return true;
                return false;
            case 0x00001020:
                /* 100111.. .01...01 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:29 */
                if (trans_addw(ctx, &u.f_r)) return true;
                return false;
            }
            return false;
        }
        return false;
    case 0x00008002:
        /* 100..... ......10 */
        switch ((insn >> 12) & 0x1) {
        case 0x0:
            /* 1000.... ......10 */
            if ((insn & 0x00000ffc) == 0x00000000) {
                /* 10000000 00000010 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:122 */
                decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
                if (trans_illegal(ctx, &u.f_empty)) return true;
            }
            if ((insn & 0x0000007c) == 0x00000000) {
                /* 1000.... .0000010 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:123 */
                decode_insn16_extract_c_jalr(ctx, &u.f_i, insn);
                u.f_i.rd = 0;
                if (trans_jalr(ctx, &u.f_i)) return true;
            }
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:124 */
            decode_insn16_extract_c_mv(ctx, &u.f_i, insn);
            if (trans_addi(ctx, &u.f_i)) return true;
            return false;
        case 0x1:
            /* 1001.... ......10 */
            if ((insn & 0x00000ffc) == 0x00000000) {
                /* 10010000 00000010 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:127 */
                decode_insn16_extract_decode_insn16_Fmt_22(ctx, &u.f_empty, insn);
                if (trans_ebreak(ctx, &u.f_empty)) return true;
            }
            if ((insn & 0x0000007c) == 0x00000000) {
                /* 1001.... .0000010 */
                /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:128 */
                decode_insn16_extract_c_jalr(ctx, &u.f_i, insn);
                u.f_i.rd = 1;
                if (trans_jalr(ctx, &u.f_i)) return true;
            }
            /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:129 */
            decode_insn16_extract_cr(ctx, &u.f_r, insn);
            if (trans_add(ctx, &u.f_r)) return true;
            return false;
        }
        return false;
    case 0x0000a000:
        /* 101..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:92 */
        decode_insn16_extract_cs_d(ctx, &u.f_s, insn);
        if (trans_fsd(ctx, &u.f_s)) return true;
        return false;
    case 0x0000a001:
        /* 101..... ......01 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:110 */
        decode_insn16_extract_cj(ctx, &u.f_j, insn);
        u.f_j.rd = 0;
        if (trans_jal(ctx, &u.f_j)) return true;
        return false;
    case 0x0000a002:
        /* 101..... ......10 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:131 */
        decode_insn16_extract_c_sdsp(ctx, &u.f_s, insn);
        if (trans_fsd(ctx, &u.f_s)) return true;
        return false;
    case 0x0000c000:
        /* 110..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:93 */
        decode_insn16_extract_cs_w(ctx, &u.f_s, insn);
        if (trans_sw(ctx, &u.f_s)) return true;
        return false;
    case 0x0000c001:
        /* 110..... ......01 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:111 */
        decode_insn16_extract_cb_z(ctx, &u.f_b, insn);
        if (trans_beq(ctx, &u.f_b)) return true;
        return false;
    case 0x0000c002:
        /* 110..... ......10 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:132 */
        decode_insn16_extract_c_swsp(ctx, &u.f_s, insn);
        if (trans_sw(ctx, &u.f_s)) return true;
        return false;
    case 0x0000e000:
        /* 111..... ......00 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:21 */
        decode_insn16_extract_cs_d(ctx, &u.f_s, insn);
        if (trans_sd(ctx, &u.f_s)) return true;
        return false;
    case 0x0000e001:
        /* 111..... ......01 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16.decode:112 */
        decode_insn16_extract_cb_z(ctx, &u.f_b, insn);
        if (trans_bne(ctx, &u.f_b)) return true;
        return false;
    case 0x0000e002:
        /* 111..... ......10 */
        /* /home/me/projects/unicorn2/qemu-5.0.0-build/target/riscv/insn16-64.decode:36 */
        decode_insn16_extract_c_sdsp(ctx, &u.f_s, insn);
        if (trans_sd(ctx, &u.f_s)) return true;
        return false;
    }
    return false;
}
