This code should now build the x86_x64-softmmu part 2.

This commit is contained in:
xorstream
2017-01-19 22:50:28 +11:00
parent 37f9a248ea
commit 1aeaf5c40d
174 changed files with 2418 additions and 1414 deletions

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@ -1,7 +1,7 @@
#ifndef UC_LLIST_H
#define UC_LLIST_H
#include <stdbool.h>
#include "platform.h"
struct list_item {
struct list_item *next;

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@ -238,6 +238,7 @@ static void usleep(const int64_t &t) {
// misc support
#if defined(_MSC_VER)
#define va_copy(d,s) ((d) = (s))
#define snprintf _snprintf
#define strcasecmp _stricmp
#if (_MSC_VER <= MSC_VER_VS2013)
@ -247,4 +248,5 @@ static void usleep(const int64_t &t) {
#endif // UNICORN_PLATFORM_H

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@ -4,7 +4,7 @@
#ifndef UC_PRIV_H
#define UC_PRIV_H
#include <stdint.h>
#include "platform.h"
#include <stdio.h>
#include "qemu.h"
@ -110,9 +110,11 @@ enum uc_hook_idx {
UC_HOOK_MAX,
};
#define HOOK_FOREACH_VAR_DECLARE \
struct list_item *cur
// for loop macro to loop over hook lists
#define HOOK_FOREACH(uc, hh, idx) \
struct list_item *cur; \
for ( \
cur = (uc)->hook[idx##_IDX].head; \
cur != NULL && ((hh) = (struct hook *)cur->data) \

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@ -8,7 +8,7 @@
extern "C" {
#endif
#include <stdint.h>
#include "platform.h"
#ifdef _MSC_VER
#pragma warning(disable:4201)

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@ -8,7 +8,7 @@
extern "C" {
#endif
#include <stdint.h>
#include "platform.h"
// GCC SPARC toolchain has a default macro called "sparc" which breaks
// compilation

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@ -8,16 +8,7 @@
extern "C" {
#endif
#include <stdint.h>
#ifdef _MSC_VER
#ifndef __cplusplus
typedef unsigned char bool;
#define false 0
#define true 1
#endif
#else
#include <stdbool.h>
#endif
#include "platform.h"
#include <stdarg.h>
#if defined(UNICORN_HAS_OSXKERNEL)
#include <libkern/libkern.h>
@ -38,6 +29,12 @@ typedef size_t uc_hook;
#include "mips.h"
#include "sparc.h"
#ifdef __GNUC__
#define DEFAULT_VISIBILITY __attribute__((visibility("default")))
#else
#define DEFAULT_VISIBILITY
#endif
#ifdef _MSC_VER
#pragma warning(disable:4201)
#pragma warning(disable:4100)

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@ -8,7 +8,7 @@
extern "C" {
#endif
#include <stdint.h>
#include "platform.h"
// Memory-Management Register for instructions IDTR, GDTR, LDTR, TR.
// Borrow from SegmentCache in qemu/target-i386/cpu.h