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This code should now build the x86_x64-softmmu part 2.

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This commit is contained in:
xorstream
2017-01-19 22:50:28 +11:00
parent 37f9a248ea
commit 1aeaf5c40d
174 changed files with 2418 additions and 1414 deletions
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104
qemu/target-i386/unicorn.c
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@ -150,10 +150,17 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
switch(regid) {
default:
break;
case UC_X86_REG_FP0 ... UC_X86_REG_FP7:
case UC_X86_REG_FP0:
case UC_X86_REG_FP1:
case UC_X86_REG_FP2:
case UC_X86_REG_FP3:
case UC_X86_REG_FP4:
case UC_X86_REG_FP5:
case UC_X86_REG_FP6:
case UC_X86_REG_FP7:
{
floatx80 reg = X86_CPU(uc, mycpu)->env.fpregs[regid - UC_X86_REG_FP0].d;
cpu_get_fp80(value, value+sizeof(uint64_t), reg);
cpu_get_fp80(value, (uint16_t*)((char*)value+sizeof(uint64_t)), reg);
}
continue;
case UC_X86_REG_FPSW:
@ -197,7 +204,14 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
*(uint16_t*) value = fptag;
}
continue;
case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7:
case UC_X86_REG_XMM0:
case UC_X86_REG_XMM1:
case UC_X86_REG_XMM2:
case UC_X86_REG_XMM3:
case UC_X86_REG_XMM4:
case UC_X86_REG_XMM5:
case UC_X86_REG_XMM6:
case UC_X86_REG_XMM7:
{
float64 *dst = (float64*)value;
XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0];
@ -234,10 +248,21 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
switch(regid) {
default:
break;
case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
case UC_X86_REG_CR0:
case UC_X86_REG_CR1:
case UC_X86_REG_CR2:
case UC_X86_REG_CR3:
case UC_X86_REG_CR4:
*(int32_t *)value = X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0];
break;
case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
case UC_X86_REG_DR0:
case UC_X86_REG_DR1:
case UC_X86_REG_DR2:
case UC_X86_REG_DR3:
case UC_X86_REG_DR4:
case UC_X86_REG_DR5:
case UC_X86_REG_DR6:
case UC_X86_REG_DR7:
*(int32_t *)value = X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0];
break;
case UC_X86_REG_EFLAGS:
@ -367,10 +392,21 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
switch(regid) {
default:
break;
case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
case UC_X86_REG_CR0:
case UC_X86_REG_CR1:
case UC_X86_REG_CR2:
case UC_X86_REG_CR3:
case UC_X86_REG_CR4:
*(int64_t *)value = X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0];
break;
case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
case UC_X86_REG_DR0:
case UC_X86_REG_DR1:
case UC_X86_REG_DR2:
case UC_X86_REG_DR3:
case UC_X86_REG_DR4:
case UC_X86_REG_DR5:
case UC_X86_REG_DR6:
case UC_X86_REG_DR7:
*(int64_t *)value = X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0];
break;
case UC_X86_REG_EFLAGS:
@ -647,10 +683,17 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
switch(regid) {
default:
break;
case UC_X86_REG_FP0 ... UC_X86_REG_FP7:
case UC_X86_REG_FP0:
case UC_X86_REG_FP1:
case UC_X86_REG_FP2:
case UC_X86_REG_FP3:
case UC_X86_REG_FP4:
case UC_X86_REG_FP5:
case UC_X86_REG_FP6:
case UC_X86_REG_FP7:
{
uint64_t mant = *(uint64_t*) value;
uint16_t upper = *(uint16_t*) (value + sizeof(uint64_t));
uint16_t upper = *(uint16_t*) ((char*)value + sizeof(uint64_t));
X86_CPU(uc, mycpu)->env.fpregs[regid - UC_X86_REG_FP0].d = cpu_set_fp80(mant, upper);
}
continue;
@ -676,7 +719,14 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
continue;
}
break;
case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7:
case UC_X86_REG_XMM0:
case UC_X86_REG_XMM1:
case UC_X86_REG_XMM2:
case UC_X86_REG_XMM3:
case UC_X86_REG_XMM4:
case UC_X86_REG_XMM5:
case UC_X86_REG_XMM6:
case UC_X86_REG_XMM7:
{
float64 *src = (float64*)value;
XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0];
@ -714,10 +764,21 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
switch(regid) {
default:
break;
case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
case UC_X86_REG_CR0:
case UC_X86_REG_CR1:
case UC_X86_REG_CR2:
case UC_X86_REG_CR3:
case UC_X86_REG_CR4:
X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0] = *(uint32_t *)value;
break;
case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
case UC_X86_REG_DR0:
case UC_X86_REG_DR1:
case UC_X86_REG_DR2:
case UC_X86_REG_DR3:
case UC_X86_REG_DR4:
case UC_X86_REG_DR5:
case UC_X86_REG_DR6:
case UC_X86_REG_DR7:
X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0] = *(uint32_t *)value;
break;
case UC_X86_REG_EFLAGS:
@ -854,10 +915,21 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
switch(regid) {
default:
break;
case UC_X86_REG_CR0 ... UC_X86_REG_CR4:
case UC_X86_REG_CR0:
case UC_X86_REG_CR1:
case UC_X86_REG_CR2:
case UC_X86_REG_CR3:
case UC_X86_REG_CR4:
X86_CPU(uc, mycpu)->env.cr[regid - UC_X86_REG_CR0] = *(uint64_t *)value;
break;
case UC_X86_REG_DR0 ... UC_X86_REG_DR7:
case UC_X86_REG_DR0:
case UC_X86_REG_DR1:
case UC_X86_REG_DR2:
case UC_X86_REG_DR3:
case UC_X86_REG_DR4:
case UC_X86_REG_DR5:
case UC_X86_REG_DR6:
case UC_X86_REG_DR7:
X86_CPU(uc, mycpu)->env.dr[regid - UC_X86_REG_DR0] = *(uint64_t *)value;
break;
case UC_X86_REG_EFLAGS:
@ -1133,7 +1205,7 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
return 0;
}
__attribute__ ((visibility ("default")))
DEFAULT_VISIBILITY
int x86_uc_machine_init(struct uc_struct *uc)
{
return machine_initialize(uc);
@ -1151,7 +1223,7 @@ static bool x86_stop_interrupt(int intno)
void pc_machine_init(struct uc_struct *uc);
__attribute__ ((visibility ("default")))
DEFAULT_VISIBILITY
void x86_uc_init(struct uc_struct* uc)
{
apic_register_types(uc);