fix merge conflict
This commit is contained in:
@ -1,4 +1,4 @@
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DEF_HELPER_5(uc_tracecode, void, i32, ptr, ptr, i64, ptr)
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DEF_HELPER_4(uc_tracecode, void, i32, i32, ptr, i64)
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DEF_HELPER_FLAGS_1(clz_arm, TCG_CALL_NO_RWG_SE, i32, i32)
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@ -10984,10 +10984,8 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
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s->pc += 4;
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// Unicorn: trace this instruction on request
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if (env->uc->hook_insn) {
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc - 4);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 4, trace->callback, env->uc, s->pc - 4, trace->user_data);
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if (HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_CODE, s->pc - 4)) {
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gen_uc_tracecode(tcg_ctx, 4, UC_HOOK_CODE_IDX, env->uc, s->pc - 4);
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// the callback might want to stop emulation immediately
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check_exit_request(tcg_ctx);
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}
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@ -11114,13 +11112,10 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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// Unicorn: trace this block on request
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (env->uc->hook_block && !env->uc->block_full) {
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struct hook_struct *trace = hook_find(env->uc, UC_HOOK_BLOCK, pc_start);
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if (trace) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, pc_start, trace->user_data);
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}
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, pc_start)) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, pc_start);
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}
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gen_tb_start(tcg_ctx);
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@ -7687,10 +7687,8 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) // qq
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}
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// Unicorn: trace this instruction on request
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if (s->uc->hook_insn) {
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc - 4);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 4, trace->callback, s->uc, s->pc - 4, trace->user_data);
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if (HOOK_EXISTS_BOUNDED(s->uc, UC_HOOK_CODE, s->pc - 4)) {
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gen_uc_tracecode(tcg_ctx, 4, UC_HOOK_CODE_IDX, s->uc, s->pc - 4);
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// the callback might want to stop emulation immediately
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check_exit_request(tcg_ctx);
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}
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@ -10408,15 +10406,10 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) // qq
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}
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// Unicorn: trace this instruction on request
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if (env->uc->hook_insn) {
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struct hook_struct *trace = hook_find(s->uc, UC_HOOK_CODE, s->pc);
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if (trace)
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gen_uc_tracecode(tcg_ctx, 2, trace->callback, env->uc, s->pc, trace->user_data);
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// if requested to emulate only some instructions, check to see
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// if we need to exit immediately
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if (env->uc->emu_count > 0) {
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check_exit_request(tcg_ctx);
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}
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if (HOOK_EXISTS_BOUNDED(s->uc, UC_HOOK_CODE, s->pc)) {
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gen_uc_tracecode(tcg_ctx, 2, UC_HOOK_CODE_IDX, s->uc, s->pc);
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// the callback might want to stop emulation immediately
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check_exit_request(tcg_ctx);
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}
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insn = arm_lduw_code(env, s->pc, s->bswap_code);
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@ -11237,13 +11230,10 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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// Unicorn: trace this block on request
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (env->uc->hook_block && !env->uc->block_full) {
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struct hook_struct *trace = hook_find(env->uc, UC_HOOK_BLOCK, pc_start);
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if (trace) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, pc_start, trace->user_data);
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}
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, pc_start)) {
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, pc_start);
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}
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gen_tb_start(tcg_ctx);
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@ -99,6 +99,9 @@ int arm64_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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break;
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case UC_ARM64_REG_PC:
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ARM_CPU(uc, mycpu)->env.pc = *(uint64_t *)value;
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// force to quit execution and flush TB
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uc->quit_request = true;
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uc_emu_stop(uc);
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break;
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case UC_ARM64_REG_SP:
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ARM_CPU(uc, mycpu)->env.xregs[31] = *(uint64_t *)value;
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@ -59,36 +59,28 @@ int arm_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
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mycpu = first_cpu;
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switch(uc->mode) {
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default:
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break;
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case UC_MODE_ARM:
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case UC_MODE_THUMB:
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if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0];
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else {
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switch(regid) {
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case UC_ARM_REG_CPSR:
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*(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env);
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break;
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//case UC_ARM_REG_SP:
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case UC_ARM_REG_R13:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[13];
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break;
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//case UC_ARM_REG_LR:
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case UC_ARM_REG_R14:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[14];
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break;
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//case UC_ARM_REG_PC:
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case UC_ARM_REG_R15:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15];
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break;
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}
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}
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break;
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if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0];
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else {
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switch(regid) {
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case UC_ARM_REG_CPSR:
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*(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env);
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break;
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//case UC_ARM_REG_SP:
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case UC_ARM_REG_R13:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[13];
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break;
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//case UC_ARM_REG_LR:
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case UC_ARM_REG_R14:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[14];
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break;
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//case UC_ARM_REG_PC:
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case UC_ARM_REG_R15:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15];
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break;
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}
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}
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return 0;
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}
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@ -101,31 +93,28 @@ int arm_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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{
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CPUState *mycpu = first_cpu;
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switch(uc->mode) {
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default:
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break;
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if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
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ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0] = *(uint32_t *)value;
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else {
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switch(regid) {
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//case UC_ARM_REG_SP:
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case UC_ARM_REG_R13:
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ARM_CPU(uc, mycpu)->env.regs[13] = *(uint32_t *)value;
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break;
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//case UC_ARM_REG_LR:
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case UC_ARM_REG_R14:
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ARM_CPU(uc, mycpu)->env.regs[14] = *(uint32_t *)value;
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break;
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//case UC_ARM_REG_PC:
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case UC_ARM_REG_R15:
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ARM_CPU(uc, mycpu)->env.pc = *(uint32_t *)value;
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ARM_CPU(uc, mycpu)->env.regs[15] = *(uint32_t *)value;
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// force to quit execution and flush TB
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uc->quit_request = true;
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uc_emu_stop(uc);
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case UC_MODE_ARM:
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case UC_MODE_THUMB:
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if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
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ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0] = *(uint32_t *)value;
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else {
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switch(regid) {
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//case UC_ARM_REG_SP:
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case UC_ARM_REG_R13:
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ARM_CPU(uc, mycpu)->env.regs[13] = *(uint32_t *)value;
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break;
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//case UC_ARM_REG_LR:
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case UC_ARM_REG_R14:
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ARM_CPU(uc, mycpu)->env.regs[14] = *(uint32_t *)value;
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break;
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//case UC_ARM_REG_PC:
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case UC_ARM_REG_R15:
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ARM_CPU(uc, mycpu)->env.regs[15] = *(uint32_t *)value;
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break;
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}
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}
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break;
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break;
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}
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}
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return 0;
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@ -141,6 +130,19 @@ static bool arm_stop_interrupt(int intno)
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}
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}
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static uc_err arm_query(struct uc_struct *uc, uc_query_type type, size_t *result)
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{
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CPUState *mycpu = first_cpu;
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switch(type) {
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case UC_QUERY_MODE:
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*result = (ARM_CPU(uc, mycpu)->env.thumb != 0);
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return UC_ERR_OK;
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default:
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return UC_ERR_ARG;
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}
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}
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void arm_uc_init(struct uc_struct* uc)
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{
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register_accel_types(uc);
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@ -152,5 +154,6 @@ void arm_uc_init(struct uc_struct* uc)
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uc->set_pc = arm_set_pc;
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uc->stop_interrupt = arm_stop_interrupt;
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uc->release = arm_release;
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uc->query = arm_query;
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uc_common_init(uc);
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}
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