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Added MXCSR register, fixed writing to FPUCW. (#1059)

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* Added MXCSR register for reading and writing

* Changed writing for fpucw register, now the qemu rounding status is updated as well
This commit is contained in:
dmarxn
2019-02-15 06:59:49 +02:00
committed by Nguyen Anh Quynh
parent 360e9c60e1
commit 256e7782ce
2 changed files with 14 additions and 2 deletions
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2
include/unicorn/x86.h
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@ -88,7 +88,7 @@ typedef enum uc_x86_reg {
UC_X86_REG_IDTR, UC_X86_REG_GDTR, UC_X86_REG_LDTR, UC_X86_REG_TR, UC_X86_REG_FPCW, UC_X86_REG_IDTR, UC_X86_REG_GDTR, UC_X86_REG_LDTR, UC_X86_REG_TR, UC_X86_REG_FPCW,
UC_X86_REG_FPTAG, UC_X86_REG_FPTAG,
UC_X86_REG_MSR, // Model-Specific Register UC_X86_REG_MSR, // Model-Specific Register
UC_X86_REG_MXCSR,
UC_X86_REG_ENDING // <-- mark the end of the list of registers UC_X86_REG_ENDING // <-- mark the end of the list of registers
} uc_x86_reg; } uc_x86_reg;

14
qemu/target-i386/unicorn.c
View File

@ -471,6 +471,9 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_X86_REG_MSR: case UC_X86_REG_MSR:
x86_msr_read(uc, (uc_x86_msr *)value); x86_msr_read(uc, (uc_x86_msr *)value);
break; break;
case UC_X86_REG_MXCSR:
*(uint32_t *)value = X86_CPU(uc, mycpu)->env.mxcsr;
break;
} }
break; break;
@ -753,6 +756,9 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_X86_REG_MSR: case UC_X86_REG_MSR:
x86_msr_read(uc, (uc_x86_msr *)value); x86_msr_read(uc, (uc_x86_msr *)value);
break; break;
case UC_X86_REG_MXCSR:
*(uint32_t *)value = X86_CPU(uc, mycpu)->env.mxcsr;
break;
} }
break; break;
#endif #endif
@ -795,7 +801,7 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
} }
continue; continue;
case UC_X86_REG_FPCW: case UC_X86_REG_FPCW:
X86_CPU(uc, mycpu)->env.fpuc = *(uint16_t *)value; cpu_set_fpuc(&X86_CPU(uc, mycpu)->env, *(uint16_t *)value);
continue; continue;
case UC_X86_REG_FPTAG: case UC_X86_REG_FPTAG:
{ {
@ -1018,6 +1024,9 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
case UC_X86_REG_MSR: case UC_X86_REG_MSR:
x86_msr_write(uc, (uc_x86_msr *)value); x86_msr_write(uc, (uc_x86_msr *)value);
break; break;
case UC_X86_REG_MXCSR:
cpu_set_mxcsr(&X86_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
} }
break; break;
@ -1310,6 +1319,9 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
case UC_X86_REG_MSR: case UC_X86_REG_MSR:
x86_msr_write(uc, (uc_x86_msr *)value); x86_msr_write(uc, (uc_x86_msr *)value);
break; break;
case UC_X86_REG_MXCSR:
cpu_set_mxcsr(&X86_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
} }
break; break;
#endif #endif