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@ -961,7 +961,7 @@ typedef struct CCPrepare {
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bool no_setcond;
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} CCPrepare;
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CCPrepare ccprepare_setup(TCGCond cond,
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static inline CCPrepare ccprepare_make(TCGCond cond,
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TCGv reg, TCGv reg2,
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target_ulong imm, target_ulong mask,
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bool use_reg2, bool no_setcond)
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@ -1000,38 +1000,38 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
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t1 = gen_ext_tl(tcg_ctx, cpu_tmp0, cpu_cc_src, size, false);
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t0 = gen_ext_tl(tcg_ctx, reg, cpu_cc_dst, size, false);
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add_sub:
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return ccprepare_setup(TCG_COND_LTU, t0,t1, 0,-1, true,false);
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return ccprepare_make(TCG_COND_LTU, t0,t1, 0,-1, true,false);
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case CC_OP_LOGICB: case CC_OP_LOGICW: case CC_OP_LOGICL: case CC_OP_LOGICQ:
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case CC_OP_CLR:
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return ccprepare_setup(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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case CC_OP_INCB: case CC_OP_INCW: case CC_OP_INCL: case CC_OP_INCQ:
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case CC_OP_DECB: case CC_OP_DECW: case CC_OP_DECL: case CC_OP_DECQ:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,-1, false,true );
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,-1, false,true );
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case CC_OP_SHLB: case CC_OP_SHLW: case CC_OP_SHLL: case CC_OP_SHLQ:
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/* (CC_SRC >> (DATA_BITS - 1)) & 1 */
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size = s->cc_op - CC_OP_SHLB;
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shift = (8 << size) - 1;
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,(target_ulong)(1 << shift), false,false);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,(target_ulong)(1 << shift), false,false);
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case CC_OP_MULB: case CC_OP_MULW: case CC_OP_MULL: case CC_OP_MULQ:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,-1, false,false );
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,-1, false,false );
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case CC_OP_BMILGB: case CC_OP_BMILGW: case CC_OP_BMILGL: case CC_OP_BMILGQ:
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size = s->cc_op - CC_OP_BMILGB;
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t0 = gen_ext_tl(tcg_ctx, reg, cpu_cc_src, size, false);
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return ccprepare_setup(TCG_COND_EQ, t0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_EQ, t0,0, 0,-1, false,false);
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case CC_OP_ADCX:
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case CC_OP_ADCOX:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_dst,0, 0,-1, false,true);
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return ccprepare_make(TCG_COND_NE, cpu_cc_dst,0, 0,-1, false,true);
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case CC_OP_EFLAGS:
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case CC_OP_SARB: case CC_OP_SARW: case CC_OP_SARL: case CC_OP_SARQ:
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/* CC_SRC & 1 */
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_C, false,false);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_C, false,false);
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default:
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/* The need to compute only C from CC_OP_DYNAMIC is important
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@ -1039,7 +1039,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
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gen_update_cc_op(s);
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gen_helper_cc_compute_c(tcg_ctx, reg, cpu_cc_dst, cpu_cc_src,
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cpu_cc_src2, cpu_cc_op);
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return ccprepare_setup(TCG_COND_NE, reg,0, 0,-1, false,true);
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return ccprepare_make(TCG_COND_NE, reg,0, 0,-1, false,true);
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}
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}
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@ -1050,7 +1050,7 @@ static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg)
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TCGv cpu_cc_src = *(TCGv *)tcg_ctx->cpu_cc_src;
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gen_compute_eflags(s);
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_P, false,false);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_P, false,false);
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}
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/* compute eflags.S to reg */
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@ -1068,14 +1068,14 @@ static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg)
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case CC_OP_ADCX:
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case CC_OP_ADOX:
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case CC_OP_ADCOX:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_S, false,false);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_S, false,false);
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case CC_OP_CLR:
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return ccprepare_setup(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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default:
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{
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TCGMemOp size = (s->cc_op - CC_OP_ADDB) & 3;
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TCGv t0 = gen_ext_tl(tcg_ctx, reg, cpu_cc_dst, size, true);
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return ccprepare_setup(TCG_COND_LT, t0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_LT, t0,0, 0,-1, false,false);
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}
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}
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}
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@ -1090,12 +1090,12 @@ static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg)
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switch (s->cc_op) {
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case CC_OP_ADOX:
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case CC_OP_ADCOX:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src2,0, 0,-1, false,true);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src2,0, 0,-1, false,true);
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case CC_OP_CLR:
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return ccprepare_setup(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_NEVER, 0,0, 0,-1, false,false);
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default:
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gen_compute_eflags(s);
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_O, false,false );
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_O, false,false );
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}
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}
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@ -1114,14 +1114,14 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
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case CC_OP_ADCX:
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case CC_OP_ADOX:
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case CC_OP_ADCOX:
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return ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_Z, false,false);
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return ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_Z, false,false);
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case CC_OP_CLR:
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return ccprepare_setup(TCG_COND_ALWAYS, 0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_ALWAYS, 0,0, 0,-1, false,false);
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default:
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{
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TCGMemOp size = (s->cc_op - CC_OP_ADDB) & 3;
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TCGv t0 = gen_ext_tl(tcg_ctx, reg, cpu_cc_dst, size, false);
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return ccprepare_setup(TCG_COND_EQ, t0,0, 0,-1, false,false);
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return ccprepare_make(TCG_COND_EQ, t0,0, 0,-1, false,false);
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}
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}
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}
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@ -1155,7 +1155,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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tcg_gen_mov_tl(tcg_ctx, cpu_tmp4, cpu_cc_srcT);
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gen_extu(tcg_ctx, size, cpu_tmp4);
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t0 = gen_ext_tl(tcg_ctx, cpu_tmp0, cpu_cc_src, size, false);
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cc = ccprepare_setup(TCG_COND_LEU, cpu_tmp4,t0, 0,-1, true,false);
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cc = ccprepare_make(TCG_COND_LEU, cpu_tmp4,t0, 0,-1, true,false);
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break;
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case JCC_L:
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@ -1167,7 +1167,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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tcg_gen_mov_tl(tcg_ctx, cpu_tmp4, cpu_cc_srcT);
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gen_exts(tcg_ctx, size, cpu_tmp4);
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t0 = gen_ext_tl(tcg_ctx, cpu_tmp0, cpu_cc_src, size, true);
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cc = ccprepare_setup(cond, cpu_tmp4,t0, 0,-1, true,false);
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cc = ccprepare_make(cond, cpu_tmp4,t0, 0,-1, true,false);
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break;
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default:
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@ -1190,7 +1190,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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break;
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case JCC_BE:
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gen_compute_eflags(s);
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cc = ccprepare_setup(TCG_COND_NE, cpu_cc_src,0, 0,CC_Z | CC_C, false,false);
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cc = ccprepare_make(TCG_COND_NE, cpu_cc_src,0, 0,CC_Z | CC_C, false,false);
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break;
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case JCC_S:
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cc = gen_prepare_eflags_s(s, reg);
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@ -1205,7 +1205,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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}
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tcg_gen_shri_tl(tcg_ctx, reg, cpu_cc_src, 4); /* CC_O -> CC_S */
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tcg_gen_xor_tl(tcg_ctx, reg, reg, cpu_cc_src);
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cc = ccprepare_setup(TCG_COND_NE, reg,0, 0,CC_S, false,false);
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cc = ccprepare_make(TCG_COND_NE, reg,0, 0,CC_S, false,false);
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break;
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default:
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case JCC_LE:
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@ -1215,7 +1215,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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}
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tcg_gen_shri_tl(tcg_ctx, reg, cpu_cc_src, 4); /* CC_O -> CC_S */
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tcg_gen_xor_tl(tcg_ctx, reg, reg, cpu_cc_src);
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cc = ccprepare_setup(TCG_COND_NE, reg,0, 0,CC_S | CC_Z, false,false);
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cc = ccprepare_make(TCG_COND_NE, reg,0, 0,CC_S | CC_Z, false,false);
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break;
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}
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break;
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