From 567bd08b86ca63718f1e1018da18a9958d5fa233 Mon Sep 17 00:00:00 2001
From: mio <mio@lazym.io>
Date: Tue, 19 Oct 2021 23:22:13 +0200
Subject: [PATCH] Update riscv pc and fix #1465

---
 qemu/target/riscv/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qemu/target/riscv/translate.c b/qemu/target/riscv/translate.c
index 7aa55188..9898093d 100644
--- a/qemu/target/riscv/translate.c
+++ b/qemu/target/riscv/translate.c
@@ -899,6 +899,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
 static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
 {
     DisasContext *ctx = container_of(dcbase, DisasContext, base);
+    TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
 
     switch (ctx->base.is_jmp) {
     case DISAS_TOO_MANY:
@@ -907,6 +908,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
     case DISAS_NORETURN:
         break;
     case DISAS_UC_EXIT:
+        tcg_gen_movi_tl(tcg_ctx, tcg_ctx->cpu_pc, ctx->base.pc_next);
         gen_helper_uc_riscv_exit(ctx->uc->tcg_ctx, ctx->uc->tcg_ctx->cpu_env);
         break;
     default: