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Remove armeb-softmmu and aarch64eb-softmmu

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This commit is contained in:
lazymio
2022-02-12 14:15:54 +01:00
parent 15f3b58d9b
commit 58fc952230
16 changed files with 118 additions and 5137 deletions
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2979
qemu/aarch64eb.h
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File diff suppressed because it is too large Load Diff

1988
qemu/armeb.h
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File diff suppressed because it is too large Load Diff

8
qemu/target/arm/arm_ldst.h
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@ -41,9 +41,11 @@ static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
TCGContext *tcg_ctx = env->uc->tcg_ctx;
/* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped
within each word. Undo that now. */
if (sctlr_b) {
addr ^= 2;
}
// Unicorn: Note that we don't have any loader so this patch makes no sense.
// And sctlr_b is 0 in aarch64.
// if (sctlr_b) {
// addr ^= 2;
// }
return translator_lduw_swap(tcg_ctx, env, addr, bswap_code(sctlr_b));
}

34
qemu/target/arm/cpu.c
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@ -2100,6 +2100,7 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
ARMCPU *cpu;
CPUState *cs;
CPUClass *cc;
CPUARMState *env;
cpu = calloc(1, sizeof(*cpu));
if (cpu == NULL) {
@ -2116,7 +2117,11 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
} else if (uc->mode & UC_MODE_ARM1176) {
uc->cpu_model = UC_CPU_ARM_1176;
} else if (uc->cpu_model == INT_MAX) {
uc->cpu_model = UC_CPU_ARM_CORTEX_A15; // cortex-a15
if (uc->mode & UC_MODE_BIG_ENDIAN) {
uc->cpu_model = UC_CPU_ARM_1176; // For BE32 mode.
} else {
uc->cpu_model = UC_CPU_ARM_CORTEX_A15; // cortex-a15
}
} else if (uc->cpu_model >= ARR_SIZE(arm_cpus)) {
free(cpu);
return NULL;
@ -2162,5 +2167,32 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
qemu_init_vcpu(cs);
// UC_MODE_BIG_ENDIAN means big endian code and big endian
// data (BE32), which is only supported before ARMv7-A.
//
// UC_MODE_ARMBE8 shouldn't exist in fact. We do this for
// backward compatibility.
//
// UC_MODE_ARMBE8 -> little endian code, big endian data
// UC_MODE_ARMBE8 | UC_MODE_BIG_ENDIAN -> big endian code, big endian data
//
// In QEMU, all arm instruction fetch **should be** little endian, however
// we hack it to support BE32.
//
// Reference:
// https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Application-Level-Memory-Model/Endian-support/Instruction-endianness?lang=en
// https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/Endianness
env = &cpu->env;
if (uc->mode & UC_MODE_ARMBE8 || uc->mode & UC_MODE_BIG_ENDIAN) {
// Big endian data access.
env->uncached_cpsr |= CPSR_E;
}
if (uc->mode & UC_MODE_BIG_ENDIAN && !arm_feature(env, ARM_FEATURE_V7) && !arm_feature(env, ARM_FEATURE_V8)) {
// Big endian code access.
env->cp15.sctlr_ns |= SCTLR_B;
}
arm_rebuild_hflags(env);
return cpu;
}

5
qemu/target/arm/cpu.h
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@ -3233,7 +3233,10 @@ static inline bool bswap_code(bool sctlr_b)
/* All code access in ARM is little endian, and there are no loaders
* doing swaps that need to be reversed
*/
return 0;
// return 0;
// Unicorn: Our hack to support BE32 for system emulation, which
// I believe shouldn't have existed...
return sctlr_b;
}
void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,

11
qemu/target/arm/cpu64.c
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@ -323,6 +323,7 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc)
ARMCPU *cpu;
CPUState *cs;
CPUClass *cc;
CPUARMState *env;
cpu = calloc(1, sizeof(*cpu));
if (cpu == NULL) {
@ -369,5 +370,15 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc)
qemu_init_vcpu(cs);
env = &cpu->env;
if (uc->mode & UC_MODE_BIG_ENDIAN) {
for (int i = 0; i < 4; i ++) {
env->cp15.sctlr_el[i] |= SCTLR_EE;
env->cp15.sctlr_el[i] |= SCTLR_E0E;
}
}
arm_rebuild_hflags(env);
return cpu;
}

5
qemu/target/arm/translate-a64.c
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@ -14411,10 +14411,7 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
s->pc_curr = s->base.pc_next;
insn = arm_ldl_code(env, s->base.pc_next, s->sctlr_b);
#ifdef TARGET_WORDS_BIGENDIAN
/* aarch64eb swap again to little endian */
insn = bswap32(insn);
#endif
s->insn = insn;
s->base.pc_next += 4;

10
qemu/target/arm/unicorn.h
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@ -18,25 +18,15 @@ int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int armeb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int armeb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int arm64_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm64_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int arm64eb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm64eb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
void arm_reg_reset(struct uc_struct *uc);
void arm64_reg_reset(struct uc_struct *uc);
void arm_uc_init(struct uc_struct *uc);
void armeb_uc_init(struct uc_struct *uc);
void arm64_uc_init(struct uc_struct *uc);
void arm64eb_uc_init(struct uc_struct *uc);
#endif

4
qemu/target/arm/unicorn_aarch64.c
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@ -425,11 +425,7 @@ static int arm64_cpus_init(struct uc_struct *uc, const char *cpu_model)
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
void arm64eb_uc_init(struct uc_struct *uc)
#else
void arm64_uc_init(struct uc_struct *uc)
#endif
{
uc->reg_read = arm64_reg_read;
uc->reg_write = arm64_reg_write;

14
qemu/target/arm/unicorn_arm.c
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@ -473,13 +473,8 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals,
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
int armeb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
#else
int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
#endif
{
CPUARMState *env = (CPUARMState *)ctx->data;
int i;
@ -498,13 +493,8 @@ int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
int armeb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
#else
int arm_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
#endif
{
CPUARMState *env = (CPUARMState *)ctx->data;
int i;
@ -581,11 +571,7 @@ static int arm_cpus_init(struct uc_struct *uc, const char *cpu_model)
return 0;
}
#ifdef TARGET_WORDS_BIGENDIAN
void armeb_uc_init(struct uc_struct *uc)
#else
void arm_uc_init(struct uc_struct *uc)
#endif
{
uc->reg_read = arm_reg_read;
uc->reg_write = arm_reg_write;