diff --git a/qemu/target-mips/translate_init.c b/qemu/target-mips/translate_init.c
index 4e1a05e2..8fafaf76 100644
--- a/qemu/target-mips/translate_init.c
+++ b/qemu/target-mips/translate_init.c
@@ -43,7 +43,7 @@
 #define MIPS_CONFIG3                                              \
 ((0 << CP0C3_M) | (0 << CP0C3_DSPP) | (0 << CP0C3_LPA) |          \
  (0 << CP0C3_VEIC) | (0 << CP0C3_VInt) | (0 << CP0C3_SP) |        \
- (0 << CP0C3_SM) | (0 << CP0C3_TL))
+ (0 << CP0C3_SM) | (0 << CP0C3_TL)) | (1 << CP0C3_ULRI)
 
 #define MIPS_CONFIG4                                              \
 ((0 << CP0C4_M))