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X64 base regs (#1166)

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* x86: setup FS & GS base

* Fixed base register writes for x64, removed then for x16/x32 (the don't exist there?)

* FS reg comes before GS so the base regs do so, too

* added shebang to const_generator.py

* Added base regs to and added 'all' support to const_generator

Co-authored-by: naq <aquynh@gmail.com>
This commit is contained in:
Dominik Maier
2020-05-05 02:34:51 +02:00
committed by GitHub
parent b7e64f3c99
commit 625399774c
9 changed files with 59 additions and 10 deletions
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27
qemu/target-i386/unicorn.c
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@ -340,6 +340,9 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_X86_REG_GS:
*(int16_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].selector;
continue;
case UC_X86_REG_FS_BASE:
*(uint32_t *)value = (uint32_t)X86_CPU(uc, mycpu)->env.segs[R_FS].base;
continue;
}
// fall-thru
case UC_MODE_32:
@ -488,6 +491,9 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_X86_REG_MXCSR:
*(uint32_t *)value = X86_CPU(uc, mycpu)->env.mxcsr;
break;
case UC_X86_REG_FS_BASE:
*(uint32_t *)value = (uint32_t)X86_CPU(uc, mycpu)->env.segs[R_FS].base;
break;
}
break;
@ -788,6 +794,12 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
dst[1] = reg->_d[1];
break;
}
case UC_X86_REG_FS_BASE:
*(uint64_t *)value = (uint64_t)X86_CPU(uc, mycpu)->env.segs[R_FS].base;
break;
case UC_X86_REG_GS_BASE:
*(uint64_t *)value = (uint64_t)X86_CPU(uc, mycpu)->env.segs[R_GS].base;
break;
}
break;
#endif
@ -1089,6 +1101,15 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
case UC_X86_REG_MXCSR:
cpu_set_mxcsr(&X86_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
/*
// Don't think base registers are a "thing" on x86
case UC_X86_REG_FS_BASE:
X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint32_t *)value;
continue;
case UC_X86_REG_GS_BASE:
X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint32_t *)value;
continue;
*/
}
break;
@ -1407,6 +1428,12 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
reg->_d[1] = src[1];
break;
}
case UC_X86_REG_FS_BASE:
X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint64_t *)value;
continue;
case UC_X86_REG_GS_BASE:
X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint64_t *)value;
continue;
}
break;
#endif