diff --git a/include/unicorn/x86.h b/include/unicorn/x86.h index b279de58..37667cfc 100644 --- a/include/unicorn/x86.h +++ b/include/unicorn/x86.h @@ -8,6 +8,15 @@ extern "C" { #endif +//Memory-Management Register fields (idtr, gdtr, ldtr, tr) +//borrow from SegmentCache in qemu/target-i386/cpu.h +typedef struct uc_x86_mmr { + uint16_t selector; /* not used by gdtr and idtr */ + uint64_t base; /* handle 32 or 64 bit CPUs */ + uint32_t limit; + uint32_t flags; /* not used by gdtr and idtr */ +} uc_x86_mmr; + // Callback function for tracing SYSCALL/SYSENTER (for uc_hook_intr()) // @user_data: user data passed to tracing APIs. typedef void (*uc_cb_insn_syscall_t)(struct uc_struct *uc, void *user_data); @@ -64,6 +73,7 @@ typedef enum uc_x86_reg { UC_X86_REG_R9D, UC_X86_REG_R10D, UC_X86_REG_R11D, UC_X86_REG_R12D, UC_X86_REG_R13D, UC_X86_REG_R14D, UC_X86_REG_R15D, UC_X86_REG_R8W, UC_X86_REG_R9W, UC_X86_REG_R10W, UC_X86_REG_R11W, UC_X86_REG_R12W, UC_X86_REG_R13W, UC_X86_REG_R14W, UC_X86_REG_R15W, + UC_X86_REG_IDTR, UC_X86_REG_GDTR, UC_X86_REG_LDTR, UC_X86_REG_TR, UC_X86_REG_ENDING // <-- mark the end of the list of registers } uc_x86_reg; diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c old mode 100644 new mode 100755 index 3da1c94d..c8436b9b --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -9,6 +9,7 @@ #include "tcg.h" #include "unicorn_common.h" +#include /* needed for uc_x86_mmr */ #define READ_QWORD(x) ((uint64)x) #define READ_DWORD(x) (x & 0xffffffff) @@ -277,6 +278,26 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) case UC_X86_REG_GS: *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; break; + case UC_X86_REG_IDTR: + ((uc_x86_mmr *)value)->limit = (uint16_t)X86_CPU(uc, mycpu)->env.idt.limit; + ((uc_x86_mmr *)value)->base = (uint32_t)X86_CPU(uc, mycpu)->env.idt.base; + break; + case UC_X86_REG_GDTR: + ((uc_x86_mmr *)value)->limit = (uint16_t)X86_CPU(uc, mycpu)->env.gdt.limit; + ((uc_x86_mmr *)value)->base = (uint32_t)X86_CPU(uc, mycpu)->env.gdt.base; + break; + case UC_X86_REG_LDTR: + ((uc_x86_mmr *)value)->limit = X86_CPU(uc, mycpu)->env.ldt.limit; + ((uc_x86_mmr *)value)->base = (uint32_t)X86_CPU(uc, mycpu)->env.ldt.base; + ((uc_x86_mmr *)value)->selector = (uint16_t)X86_CPU(uc, mycpu)->env.ldt.selector; + ((uc_x86_mmr *)value)->flags = X86_CPU(uc, mycpu)->env.ldt.flags; + break; + case UC_X86_REG_TR: + ((uc_x86_mmr *)value)->limit = X86_CPU(uc, mycpu)->env.tr.limit; + ((uc_x86_mmr *)value)->base = (uint32_t)X86_CPU(uc, mycpu)->env.tr.base; + ((uc_x86_mmr *)value)->selector = (uint16_t)X86_CPU(uc, mycpu)->env.tr.selector; + ((uc_x86_mmr *)value)->flags = X86_CPU(uc, mycpu)->env.tr.flags; + break; } break; @@ -525,6 +546,26 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) case UC_X86_REG_R15B: *(int8_t *)value = READ_BYTE_L(X86_CPU(uc, mycpu)->env.regs[15]); break; + case UC_X86_REG_IDTR: + ((uc_x86_mmr *)value)->limit = (uint16_t)X86_CPU(uc, mycpu)->env.idt.limit; + ((uc_x86_mmr *)value)->base = X86_CPU(uc, mycpu)->env.idt.base; + break; + case UC_X86_REG_GDTR: + ((uc_x86_mmr *)value)->limit = (uint16_t)X86_CPU(uc, mycpu)->env.gdt.limit; + ((uc_x86_mmr *)value)->base = X86_CPU(uc, mycpu)->env.gdt.base; + break; + case UC_X86_REG_LDTR: + ((uc_x86_mmr *)value)->limit = X86_CPU(uc, mycpu)->env.ldt.limit; + ((uc_x86_mmr *)value)->base = X86_CPU(uc, mycpu)->env.ldt.base; + ((uc_x86_mmr *)value)->selector = (uint16_t)X86_CPU(uc, mycpu)->env.ldt.selector; + ((uc_x86_mmr *)value)->flags = X86_CPU(uc, mycpu)->env.ldt.flags; + break; + case UC_X86_REG_TR: + ((uc_x86_mmr *)value)->limit = X86_CPU(uc, mycpu)->env.tr.limit; + ((uc_x86_mmr *)value)->base = X86_CPU(uc, mycpu)->env.tr.base; + ((uc_x86_mmr *)value)->selector = (uint16_t)X86_CPU(uc, mycpu)->env.tr.selector; + ((uc_x86_mmr *)value)->flags = X86_CPU(uc, mycpu)->env.tr.flags; + break; } break; #endif @@ -684,6 +725,26 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value) case UC_X86_REG_GS: X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value; break; + case UC_X86_REG_IDTR: + X86_CPU(uc, mycpu)->env.idt.limit = (uint16_t)((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.idt.base = (uint32_t)((uc_x86_mmr *)value)->base; + break; + case UC_X86_REG_GDTR: + X86_CPU(uc, mycpu)->env.gdt.limit = (uint16_t)((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.gdt.base = (uint32_t)((uc_x86_mmr *)value)->base; + break; + case UC_X86_REG_LDTR: + X86_CPU(uc, mycpu)->env.ldt.limit = ((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.ldt.base = (uint32_t)((uc_x86_mmr *)value)->base; + X86_CPU(uc, mycpu)->env.ldt.selector = (uint16_t)((uc_x86_mmr *)value)->selector; + X86_CPU(uc, mycpu)->env.ldt.flags = ((uc_x86_mmr *)value)->flags; + break; + case UC_X86_REG_TR: + X86_CPU(uc, mycpu)->env.tr.limit = ((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.tr.base = (uint32_t)((uc_x86_mmr *)value)->base; + X86_CPU(uc, mycpu)->env.tr.selector = (uint16_t)((uc_x86_mmr *)value)->selector; + X86_CPU(uc, mycpu)->env.tr.flags = ((uc_x86_mmr *)value)->flags; + break; } break; @@ -942,6 +1003,26 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value) case UC_X86_REG_R15B: WRITE_BYTE_L(X86_CPU(uc, mycpu)->env.regs[15], *(uint8_t *)value); break; + case UC_X86_REG_IDTR: + X86_CPU(uc, mycpu)->env.idt.limit = (uint16_t)((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.idt.base = ((uc_x86_mmr *)value)->base; + break; + case UC_X86_REG_GDTR: + X86_CPU(uc, mycpu)->env.gdt.limit = (uint16_t)((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.gdt.base = ((uc_x86_mmr *)value)->base; + break; + case UC_X86_REG_LDTR: + X86_CPU(uc, mycpu)->env.ldt.limit = ((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.ldt.base = ((uc_x86_mmr *)value)->base; + X86_CPU(uc, mycpu)->env.ldt.selector = (uint16_t)((uc_x86_mmr *)value)->selector; + X86_CPU(uc, mycpu)->env.ldt.flags = ((uc_x86_mmr *)value)->flags; + break; + case UC_X86_REG_TR: + X86_CPU(uc, mycpu)->env.tr.limit = ((uc_x86_mmr *)value)->limit; + X86_CPU(uc, mycpu)->env.tr.base = ((uc_x86_mmr *)value)->base; + X86_CPU(uc, mycpu)->env.tr.selector = (uint16_t)((uc_x86_mmr *)value)->selector; + X86_CPU(uc, mycpu)->env.tr.flags = ((uc_x86_mmr *)value)->flags; + break; } break; #endif diff --git a/tests/unit/test_gdt_idt_x86.c b/tests/unit/test_gdt_idt_x86.c new file mode 100644 index 00000000..5344d7a5 --- /dev/null +++ b/tests/unit/test_gdt_idt_x86.c @@ -0,0 +1,163 @@ +#include +#include +#include +#include +#include +#include + +/** + * Assert that err matches expect + */ +#define uc_assert_err(expect, err) \ +do { \ + uc_err __err = err; \ + if (__err != expect) { \ + fprintf(stderr, "%s", uc_strerror(__err)); \ + exit(1); \ + } \ +} while (0) + +/** + * Assert that err is UC_ERR_OK + */ +#define uc_assert_success(err) uc_assert_err(UC_ERR_OK, err) + +/** + * Assert that err is anything but UC_ERR_OK + * + * Note: Better to use uc_assert_err(, err), + * as this serves to document which errors a function will return + * in various scenarios. + */ +#define uc_assert_fail(err) \ +do { \ + uc_err __err = err; \ + if (__err == UC_ERR_OK) { \ + fprintf(stderr, "%s", uc_strerror(__err)); \ + exit(1); \ + } \ +} while (0) + +#define OK(x) uc_assert_success(x) + +/******************************************************************************/ + +static void test_idt_gdt_i386(/*void **state*/) +{ + uc_engine *uc; + uc_err err; + uint8_t buf[6]; + uc_x86_mmr idt; + uc_x86_mmr gdt; + uc_x86_mmr ldt; + uc_x86_mmr tr; + + const uint8_t code[] = "\x0f\x01\x0c\x24\x0f\x01\x44\x24\x06"; // sidt [esp]; sgdt [esp+6] + const uint64_t address = 0x1000000; + + int r_esp = address + 0x1000 - 0x100; // initial esp + + idt.base = 0x12345678; + idt.limit = 0xabcd; + gdt.base = 0x87654321; + gdt.limit = 0xdcba; + + ldt.base = 0xfedcba98; + ldt.limit = 0x11111111; + ldt.selector = 0x3333; + ldt.flags = 0x55555555; + + tr.base = 0x22222222; + tr.limit = 0x33333333; + tr.selector = 0x4444; + tr.flags = 0x66666666; + + // Initialize emulator in X86-32bit mode + err = uc_open(UC_ARCH_X86, UC_MODE_32, &uc); + uc_assert_success(err); + + // map 1 page memory for this emulation + err = uc_mem_map(uc, address, 0x1000, UC_PROT_ALL); + uc_assert_success(err); + + // write machine code to be emulated to memory + err = uc_mem_write(uc, address, code, sizeof(code)-1); + uc_assert_success(err); + + // initialize machine registers + err = uc_reg_write(uc, UC_X86_REG_ESP, &r_esp); + uc_assert_success(err); + err = uc_reg_write(uc, UC_X86_REG_IDTR, &idt); + uc_assert_success(err); + err = uc_reg_write(uc, UC_X86_REG_GDTR, &gdt); + uc_assert_success(err); + err = uc_reg_write(uc, UC_X86_REG_LDTR, &ldt); + uc_assert_success(err); + err = uc_reg_write(uc, UC_X86_REG_TR, &tr); + uc_assert_success(err); + + memset(&idt, 0, sizeof(idt)); + memset(&gdt, 0, sizeof(gdt)); + memset(&ldt, 0, sizeof(ldt)); + memset(&tr, 0, sizeof(tr)); + + // emulate machine code in infinite time + err = uc_emu_start(uc, address, address+sizeof(code)-1, 0, 0); + uc_assert_success(err); + + + uc_reg_read(uc, UC_X86_REG_IDTR, &idt); + assert(idt.base == 0x12345678); + assert(idt.limit == 0xabcd); + + uc_reg_read(uc, UC_X86_REG_GDTR, &gdt); + assert(gdt.base == 0x87654321); + assert(gdt.limit == 0xdcba); + + //userspace can only set ldt selector, remainder are loaded from + //GDT/LDT, but we allow all to emulator user + uc_reg_read(uc, UC_X86_REG_LDTR, &ldt); + assert(ldt.base == 0xfedcba98); + assert(ldt.limit == 0x11111111); + assert(ldt.selector == 0x3333); + assert(ldt.flags = 0x55555555); + + //userspace can only set tr selector, remainder are loaded from + //GDT/LDT, but we allow all to emulator user + uc_reg_read(uc, UC_X86_REG_TR, &tr); + assert(tr.base == 0x22222222); + assert(tr.limit == 0x33333333); + assert(tr.selector == 0x4444); + assert(tr.flags = 0x66666666); + + // read from memory + err = uc_mem_read(uc, r_esp, buf, 6); + uc_assert_success(err); + + assert(memcmp(buf, "\xcd\xab\x78\x56\x34\x12", 6) == 0); + + // read from memory + err = uc_mem_read(uc, r_esp + 6, buf, 6); + uc_assert_success(err); + + assert(memcmp(buf, "\xba\xdc\x21\x43\x65\x87", 6) == 0); + + uc_close(uc); + +} + +/******************************************************************************/ + +int main(void) { +/* + const struct CMUnitTest tests[] = { + cmocka_unit_test(test_idt_gdt_i386) + }; + return cmocka_run_group_tests(tests, NULL, NULL); +*/ + test_idt_gdt_i386(); + + fprintf(stderr, "success\n"); + + return 0; +}