diff --git a/qemu/include/qemu/bitops.h b/qemu/include/qemu/bitops.h
index 4ae468e3..b523df9d 100644
--- a/qemu/include/qemu/bitops.h
+++ b/qemu/include/qemu/bitops.h
@@ -242,7 +242,7 @@ static inline uint32_t rol32(uint32_t word, unsigned int shift)
  */
 static inline uint32_t ror32(uint32_t word, unsigned int shift)
 {
-    return (word >> shift) | (word << (32 - shift));
+    return (word >> shift) | (word << ((32 - shift) & 0x1f));
 }
 
 /**
diff --git a/qemu/target-mips/translate.c b/qemu/target-mips/translate.c
index ad8e3093..656a67b6 100644
--- a/qemu/target-mips/translate.c
+++ b/qemu/target-mips/translate.c
@@ -3217,14 +3217,14 @@ static inline void gen_pcrel(DisasContext *ctx, int rs, int16_t imm)
         switch (MASK_OPC_PCREL_TOP5BITS(ctx->opcode)) {
         case OPC_AUIPC:
             if (rs != 0) {
-                offset = imm << 16;
+                offset = ((target_ulong)imm) << 16;
                 addr = addr_add(ctx, ctx->pc, offset);
                 tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr);
             }
             break;
         case OPC_ALUIPC:
             if (rs != 0) {
-                offset = imm << 16;
+                offset = ((target_ulong)imm) << 16;
                 addr = ~0xFFFF & addr_add(ctx, ctx->pc, offset);
                 tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr);
             }