fix conflicts when merging map-ptr branch to master branch

This commit is contained in:
Nguyen Anh Quynh
2015-12-17 08:12:02 +08:00
57 changed files with 3907 additions and 54 deletions

View File

@ -86,6 +86,9 @@ void memory_unmap(struct uc_struct *uc, MemoryRegion *mr)
uc->mapped_block_count--;
//shift remainder of array down over deleted pointer
memcpy(&uc->mapped_blocks[i], &uc->mapped_blocks[i + 1], sizeof(MemoryRegion*) * (uc->mapped_block_count - i));
mr->destructor(mr);
g_free((char *)mr->name);
g_free(mr->ioeventfds);
break;
}
}
@ -93,13 +96,20 @@ void memory_unmap(struct uc_struct *uc, MemoryRegion *mr)
int memory_free(struct uc_struct *uc)
{
MemoryRegion *mr;
int i;
get_system_memory(uc)->enabled = false;
for (i = 0; i < uc->mapped_block_count; i++) {
uc->mapped_blocks[i]->enabled = false;
memory_region_del_subregion(get_system_memory(uc), uc->mapped_blocks[i]);
g_free(uc->mapped_blocks[i]);
mr = uc->mapped_blocks[i];
mr->enabled = false;
memory_region_del_subregion(get_system_memory(uc), mr);
mr->destructor(mr);
g_free((char *)mr->name);
g_free(mr->ioeventfds);
g_free(mr);
}
return 0;
}

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@ -11322,7 +11322,7 @@ static int decode_extended_mips16_opc (CPUMIPSState *env, DisasContext *ctx)
return 4;
}
static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_slot)
static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx, bool *insn_need_patch)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv **cpu_gpr = (TCGv **)tcg_ctx->cpu_gpr;
@ -11343,10 +11343,12 @@ static int decode_mips16_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_s
n_bytes = 2;
// Unicorn: trace this instruction on request
if (!is_bc_slot && env->uc->hook_insn) {
if (env->uc->hook_insn) {
struct hook_struct *trace = hook_find(env->uc, UC_HOOK_CODE, ctx->pc);
if (trace)
if (trace) {
gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, ctx->pc, trace->user_data);
*insn_need_patch = true;
}
// if requested to emulate only some instructions, check if
// we need to exit immediately
if (env->uc->emu_count > 0) {
@ -13928,7 +13930,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
}
}
static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_slot)
static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, bool *insn_need_patch)
{
TCGContext *tcg_ctx = env->uc->tcg_ctx;
TCGv **cpu_gpr = (TCGv **)tcg_ctx->cpu_gpr;
@ -13943,10 +13945,12 @@ static int decode_micromips_opc (CPUMIPSState *env, DisasContext *ctx, bool is_b
}
// Unicorn: trace this instruction on request
if (!is_bc_slot && env->uc->hook_insn) {
if (env->uc->hook_insn) {
struct hook_struct *trace = hook_find(env->uc, UC_HOOK_CODE, ctx->pc);
if (trace)
if (trace) {
gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, ctx->pc, trace->user_data);
*insn_need_patch = true;
}
// if requested to emulate only some instructions, check if
// we need to exit immediately
if (env->uc->emu_count > 0) {
@ -18503,7 +18507,7 @@ static void gen_msa(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_slot)
static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool *insn_need_patch)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
#if defined(TARGET_MIPS64)
@ -18514,7 +18518,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_slot)
uint32_t op, op1;
int16_t imm;
/* make sure instructions are on a word boundary */
if (ctx->pc & 0x3) {
env->CP0_BadVAddr = ctx->pc;
@ -18523,10 +18526,12 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool is_bc_slot)
}
// Unicorn: trace this instruction on request
if (!is_bc_slot && env->uc->hook_insn) {
if (env->uc->hook_insn) {
struct hook_struct *trace = hook_find(env->uc, UC_HOOK_CODE, ctx->pc);
if (trace)
if (trace) {
gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, ctx->pc, trace->user_data);
*insn_need_patch = true;
}
// if requested to emulate only some instructions, check if
// we need to exit immediately
if (env->uc->emu_count > 0) {
@ -19171,7 +19176,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
int max_insns;
int insn_bytes;
int is_slot = 0;
bool is_bc_slot = false;
TCGContext *tcg_ctx = env->uc->tcg_ctx;
TCGArg *save_opparam_ptr = NULL;
bool block_full = false;
@ -19268,23 +19272,23 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
ctx.bstate = BS_EXCP;
break;
} else {
bool insn_need_patch = false;
// Unicorn: save param buffer
if (env->uc->hook_insn)
save_opparam_ptr = tcg_ctx->gen_opparam_ptr;
is_slot = ctx.hflags & MIPS_HFLAG_BMASK;
is_bc_slot = (is_slot & MIPS_HFLAG_BMASK_BASE) == MIPS_HFLAG_BC;
if (!(ctx.hflags & MIPS_HFLAG_M16)) {
ctx.opcode = cpu_ldl_code(env, ctx.pc);
insn_bytes = 4;
decode_opc(env, &ctx, is_bc_slot);
decode_opc(env, &ctx, &insn_need_patch);
} else if (ctx.insn_flags & ASE_MICROMIPS) {
ctx.opcode = cpu_lduw_code(env, ctx.pc);
insn_bytes = decode_micromips_opc(env, &ctx, is_bc_slot);
insn_bytes = decode_micromips_opc(env, &ctx, &insn_need_patch);
} else if (ctx.insn_flags & ASE_MIPS16) {
ctx.opcode = cpu_lduw_code(env, ctx.pc);
insn_bytes = decode_mips16_opc(env, &ctx, is_bc_slot);
insn_bytes = decode_mips16_opc(env, &ctx, &insn_need_patch);
} else {
generate_exception(&ctx, EXCP_RI);
ctx.bstate = BS_STOP;
@ -19292,7 +19296,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
}
// Unicorn: patch the callback for the instruction size
if (!is_bc_slot && env->uc->hook_insn)
if (insn_need_patch)
*(save_opparam_ptr + 1) = insn_bytes;
}

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@ -20,6 +20,11 @@
#include "cpu.h"
#include "exec/helper-proto.h"
static uint32_t compute_null(CPUSPARCState *env)
{
return 0;
}
static uint32_t compute_all_flags(CPUSPARCState *env)
{
return env->psr & PSR_ICC;
@ -433,6 +438,7 @@ typedef struct CCTable {
static const CCTable icc_table[CC_OP_NB] = {
/* CC_OP_DYNAMIC should never happen */
[CC_OP_DYNAMIC] = { compute_null, compute_null },
[CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
[CC_OP_DIV] = { compute_all_div, compute_C_div },
[CC_OP_ADD] = { compute_all_add, compute_C_add },
@ -449,6 +455,7 @@ static const CCTable icc_table[CC_OP_NB] = {
#ifdef TARGET_SPARC64
static const CCTable xcc_table[CC_OP_NB] = {
/* CC_OP_DYNAMIC should never happen */
[CC_OP_DYNAMIC] = { compute_null, compute_null },
[CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
[CC_OP_DIV] = { compute_all_logic_xcc, compute_C_logic },
[CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },

View File

@ -807,6 +807,9 @@ static void page_flush_tb(struct uc_struct *uc)
{
int i;
if (uc->l1_map == NULL)
return;
for (i = 0; i < V_L1_SIZE; i++) {
page_flush_tb_1(V_L1_SHIFT / V_L2_BITS - 1, uc->l1_map + i);
}