diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c
index 0ee137f9..d9e77e34 100644
--- a/qemu/target/arm/helper.c
+++ b/qemu/target/arm/helper.c
@@ -7983,11 +7983,11 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
              * to switch mode. (Those are caught by translate.c for writes
              * triggered by guest instructions.)
              */
-            mask &= ~CPSR_M;
-
             // Unicorn: No, it can also be uc_reg_write, let user switch registers banks.
             if (write_type == CPSRWriteByUnicorn) {
                 switch_mode(env, val & CPSR_M);
+            } else {
+                mask &= ~CPSR_M;
             }
         } else if (bad_mode_switch(env, val & CPSR_M, write_type)) {
             /* Attempt to switch to an invalid mode: this is UNPREDICTABLE in