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@ -50,8 +50,8 @@ static void test_arm64_until()
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OK(uc_close(uc));
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OK(uc_close(uc));
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}
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}
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static void test_arm64_code_patching()
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static void test_arm64_code_patching() {
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{
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uc_engine *uc;
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uc_engine *uc;
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1);
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@ -79,7 +79,8 @@ static void test_arm64_code_patching() {
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}
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}
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// Need to flush the cache before running the emulation after patching
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// Need to flush the cache before running the emulation after patching
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static void test_arm64_code_patching_count() {
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static void test_arm64_code_patching_count()
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{
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uc_engine *uc;
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uc_engine *uc;
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1);
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@ -94,7 +95,8 @@ static void test_arm64_code_patching_count() {
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// patch instruction
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// patch instruction
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char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF
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char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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OK(uc_ctl_remove_cache(uc, code_start, code_start + sizeof(patch_code) - 1));
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OK(uc_ctl_remove_cache(uc, code_start,
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code_start + sizeof(patch_code) - 1));
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// zero out x0
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// zero out x0
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r_x0 = 0x0;
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r_x0 = 0x0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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@ -107,9 +109,7 @@ static void test_arm64_code_patching_count() {
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OK(uc_close(uc));
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OK(uc_close(uc));
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}
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}
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TEST_LIST = {
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TEST_LIST = {{"test_arm64_until", test_arm64_until},
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{"test_arm64_until", test_arm64_until},
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{"test_arm64_code_patching", test_arm64_code_patching},
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{"test_arm64_code_patching", test_arm64_code_patching},
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{"test_arm64_code_patching_count", test_arm64_code_patching_count},
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{"test_arm64_code_patching_count", test_arm64_code_patching_count},
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{NULL, NULL}
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{NULL, NULL}};
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};
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@ -372,10 +372,12 @@ static void test_riscv64_fp_move_to_int(void)
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uc_close(uc);
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uc_close(uc);
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}
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}
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static void test_riscv64_code_patching() {
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static void test_riscv64_code_patching()
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{
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uc_engine *uc;
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uc_engine *uc;
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char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1
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char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1
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uc_common_setup(&uc, UC_ARCH_RISCV, UC_MODE_RISCV64, code, sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_RISCV, UC_MODE_RISCV64, code,
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sizeof(code) - 1);
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// Zero out t0 and t1
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// Zero out t0 and t1
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uint64_t r_t0 = 0x0;
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uint64_t r_t0 = 0x0;
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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@ -400,10 +402,12 @@ static void test_riscv64_code_patching() {
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}
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}
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// Need to flush the cache before running the emulation after patching
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// Need to flush the cache before running the emulation after patching
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static void test_riscv64_code_patching_count() {
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static void test_riscv64_code_patching_count()
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{
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uc_engine *uc;
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uc_engine *uc;
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char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1
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char code[] = "\x93\x82\x12\x00"; // addi t0, t0, 0x1
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uc_common_setup(&uc, UC_ARCH_RISCV, UC_MODE_RISCV64, code, sizeof(code) - 1);
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uc_common_setup(&uc, UC_ARCH_RISCV, UC_MODE_RISCV64, code,
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sizeof(code) - 1);
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// Zero out t0 and t1
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// Zero out t0 and t1
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uint64_t r_t0 = 0x0;
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uint64_t r_t0 = 0x0;
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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@ -415,7 +419,8 @@ static void test_riscv64_code_patching_count() {
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// patch instruction
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// patch instruction
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char patch_code[] = "\x93\x82\xf2\x7f"; // addi t0, t0, 0x7FF
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char patch_code[] = "\x93\x82\xf2\x7f"; // addi t0, t0, 0x7FF
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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OK(uc_ctl_remove_cache(uc, code_start, code_start + sizeof(patch_code) - 1));
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OK(uc_ctl_remove_cache(uc, code_start,
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code_start + sizeof(patch_code) - 1));
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// zero out t0
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// zero out t0
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r_t0 = 0x0;
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r_t0 = 0x0;
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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OK(uc_reg_write(uc, UC_RISCV_REG_T0, &r_t0));
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@ -532,7 +537,8 @@ static void test_riscv64_mmio_map()
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OK(uc_close(uc));
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OK(uc_close(uc));
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}
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}
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TEST_LIST = {{"test_riscv32_nop", test_riscv32_nop},
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TEST_LIST = {
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{"test_riscv32_nop", test_riscv32_nop},
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{"test_riscv64_nop", test_riscv64_nop},
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{"test_riscv64_nop", test_riscv64_nop},
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{"test_riscv32_3steps_pc_update", test_riscv32_3steps_pc_update},
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{"test_riscv32_3steps_pc_update", test_riscv32_3steps_pc_update},
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{"test_riscv64_3steps_pc_update", test_riscv64_3steps_pc_update},
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{"test_riscv64_3steps_pc_update", test_riscv64_3steps_pc_update},
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