Fix Python 3 samples (#836)

2017-05-14 18:11:22 -07:00
parent 014ccfb94a
commit 85e0a54e35
4 changed files with 4 additions and 4 deletions
--- a/bindings/python/sample_arm64.py
+++ b/bindings/python/sample_arm64.py
@ -53,7 +53,7 @@ def test_arm64():

        # now print out some registers
        print(">>> Emulation done. Below is the CPU context")
-	print(">>> As little endian, X15 should be 0x78:");
+        print(">>> As little endian, X15 should be 0x78:")

        x11 = mu.reg_read(UC_ARM64_REG_X11)
        x13 = mu.reg_read(UC_ARM64_REG_X13)