Fix SR read/write and a test
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@ -78,7 +78,7 @@ static void reg_write(CPUM68KState *env, unsigned int regid, const void *value)
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env->pc = *(uint32_t *)value;
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break;
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case UC_M68K_REG_SR:
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env->sr = *(uint32_t *)value;
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cpu_m68k_set_sr(env, *(uint32_t *)value);
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break;
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}
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}
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@ -3,4 +3,34 @@
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const uint64_t code_start = 0x1000;
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const uint64_t code_len = 0x4000;
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TEST_LIST = {{NULL, NULL}};
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static void uc_common_setup(uc_engine **uc, uc_arch arch, uc_mode mode,
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const char *code, uint64_t size,
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uc_cpu_m68k cpu_model)
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{
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OK(uc_open(arch, mode, uc));
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OK(uc_ctl_set_cpu_model(*uc, cpu_model));
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OK(uc_mem_map(*uc, code_start, code_len, UC_PROT_ALL));
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OK(uc_mem_write(*uc, code_start, code, size));
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}
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static void test_move_to_sr()
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{
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uc_engine *uc;
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char code[] = "\x46\xfc\x27\x00"; // move #$2700,sr
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int r_sr;
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uc_common_setup(&uc, UC_ARCH_M68K, UC_MODE_BIG_ENDIAN, code,
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sizeof(code) - 1, UC_CPU_M68K_M68000);
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OK(uc_reg_read(uc, UC_M68K_REG_SR, &r_sr));
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r_sr = r_sr | 0x2000;
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OK(uc_reg_write(uc, UC_M68K_REG_SR, &r_sr));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_move_to_sr", test_move_to_sr}, {NULL, NULL}};
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