Implement coprocessor register read/write for arm
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@ -592,6 +592,29 @@ static void test_arm_mem_access_abort()
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OK(uc_close(uc));
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}
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static void test_arm_read_sctlr()
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{
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uc_engine *uc;
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uc_arm_cp_reg reg;
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OK(uc_open(UC_ARCH_ARM, UC_MODE_ARM, &uc));
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// SCTLR. See arm reference.
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reg.cp = 15;
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reg.is64 = 0;
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reg.sec = 0;
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reg.crn = 1;
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reg.crm = 0;
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reg.opc1 = 0;
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reg.opc2 = 0;
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OK(uc_reg_read(uc, UC_ARM_REG_CP_REG, ®));
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TEST_CHECK((uint32_t)((reg.val >> 31) & 1) == 0);
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_arm_nop", test_arm_nop},
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{"test_arm_thumb_sub", test_arm_thumb_sub},
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{"test_armeb_sub", test_armeb_sub},
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@ -609,4 +632,5 @@ TEST_LIST = {{"test_arm_nop", test_arm_nop},
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{"test_arm_mrc", test_arm_mrc},
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{"test_arm_hflags_rebuilt", test_arm_hflags_rebuilt},
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{"test_arm_mem_access_abort", test_arm_mem_access_abort},
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{"test_arm_read_sctlr", test_arm_read_sctlr},
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{NULL, NULL}};
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