diff --git a/bindings/haskell/src/Unicorn/CPU/X86.chs b/bindings/haskell/src/Unicorn/CPU/X86.chs
index eccb8b35..d96352e6 100644
--- a/bindings/haskell/src/Unicorn/CPU/X86.chs
+++ b/bindings/haskell/src/Unicorn/CPU/X86.chs
@@ -27,10 +27,10 @@ import Unicorn.Internal.Core (Reg)
 -- | Memory-managemen Register for instructions IDTR, GDTR, LDTR, TR.
 -- Borrow from SegmentCache in qemu/target-i386/cpu.h
 data Mmr = Mmr {
-    selector :: Word16, -- ^ Not used by GDTR and IDTR
-    base     :: Word64, -- ^ Handle 32 or 64 bit CPUs
-    limit    :: Word32,
-    flags    :: Word32  -- ^ Not used by GDTR and IDTR
+    mmrSelector :: Word16,  -- ^ Not used by GDTR and IDTR
+    mmrBase     :: Word64,  -- ^ Handle 32 or 64 bit CPUs
+    mmrLimit    :: Word32,
+    mmrFlags    :: Word32   -- ^ Not used by GDTR and IDTR
 }
 
 instance Storable Mmr where
@@ -41,10 +41,10 @@ instance Storable Mmr where
                       <*> liftA fromIntegral ({# get uc_x86_mmr->limit #} p)
                       <*> liftA fromIntegral ({# get uc_x86_mmr->flags #} p)
     poke p mmr  = do
-        {# set uc_x86_mmr.selector #} p (fromIntegral $ selector mmr)
-        {# set uc_x86_mmr.base #} p (fromIntegral $ base mmr)
-        {# set uc_x86_mmr.limit #} p (fromIntegral $ limit mmr)
-        {# set uc_x86_mmr.flags #} p (fromIntegral $ flags mmr)
+        {# set uc_x86_mmr.selector #} p (fromIntegral $ mmrSelector mmr)
+        {# set uc_x86_mmr.base #} p (fromIntegral $ mmrBase mmr)
+        {# set uc_x86_mmr.limit #} p (fromIntegral $ mmrLimit mmr)
+        {# set uc_x86_mmr.flags #} p (fromIntegral $ mmrFlags mmr)
 
 -- | X86 registers.
 {# enum uc_x86_reg as Register