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Merge with current master.

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This commit is contained in:
xorstream
2017-01-20 18:22:28 +11:00
parent 5c7c8375f9 b887c3bb25
commit 92392e0f57
115 changed files with 7 additions and 10001 deletions
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2
qemu/target-mips/cpu.c
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@ -19,12 +19,10 @@
*/
#include "cpu.h"
#include "kvm_mips.h"
#include "qemu-common.h"
#include "hw/mips/mips.h"
static void mips_cpu_set_pc(CPUState *cs, vaddr value)
{
MIPSCPU *cpu = MIPS_CPU(cs->uc, cs);

26
qemu/target-mips/kvm_mips.h
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@ -1,26 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* KVM/MIPS: MIPS specific KVM APIs
*
* Copyright (C) 2012-2014 Imagination Technologies Ltd.
* Authors: Sanjay Lal <sanjayl@kymasys.com>
*/
#ifndef __KVM_MIPS_H__
#define __KVM_MIPS_H__
/**
* kvm_mips_reset_vcpu:
* @cpu: MIPSCPU
*
* Called at reset time to set kernel registers to their initial values.
*/
void kvm_mips_reset_vcpu(MIPSCPU *cpu);
int kvm_mips_set_interrupt(MIPSCPU *cpu, int irq, int level);
int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level);
#endif /* __KVM_MIPS_H__ */

4
qemu/target-mips/op_helper.c
View File

@ -1478,7 +1478,6 @@ static void mtc0_cause(CPUMIPSState *cpu, target_ulong arg1)
{
uint32_t mask = 0x00C00300;
uint32_t old = cpu->CP0_Cause;
int i;
if (cpu->insn_flags & ISA_MIPS32R2) {
mask |= 1 << CP0Ca_DC;
@ -1497,12 +1496,15 @@ static void mtc0_cause(CPUMIPSState *cpu, target_ulong arg1)
}
}
#if 0
int i;
/* Set/reset software interrupts */
for (i = 0 ; i < 2 ; i++) {
if ((old ^ cpu->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
cpu_mips_soft_irq(cpu, i, cpu->CP0_Cause & (1 << (CP0Ca_IP + i)));
}
}
#endif
}
void helper_mtc0_cause(CPUMIPSState *env, target_ulong arg1)