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restricted fpip updates to only non-control instructions

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This commit is contained in:
mothran
2015-08-28 03:19:10 -07:00
parent 59b09a71bf
commit 933ef379b4
1 changed files with 9 additions and 1 deletions
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10
qemu/target-i386/translate.c
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@ -6070,7 +6070,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
break; break;
} }
fpu_update_ip(env);
modrm = cpu_ldub_code(env, s->pc++); modrm = cpu_ldub_code(env, s->pc++);
mod = (modrm >> 6) & 3; mod = (modrm >> 6) & 3;
rm = modrm & 7; rm = modrm & 7;
@ -6116,6 +6115,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
/* fcomp needs pop */ /* fcomp needs pop */
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
} }
fpu_update_ip(env);
} }
break; break;
case 0x08: /* flds */ case 0x08: /* flds */
@ -6200,6 +6200,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
break; break;
} }
fpu_update_ip(env);
break; break;
case 0x0c: /* fldenv mem */ case 0x0c: /* fldenv mem */
gen_update_cc_op(s); gen_update_cc_op(s);
@ -6225,12 +6226,14 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fldt_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fldt_ST0(tcg_ctx, cpu_env, cpu_A0);
fpu_update_ip(env);
break; break;
case 0x1f: /* fstpt mem */ case 0x1f: /* fstpt mem */
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fstt_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fstt_ST0(tcg_ctx, cpu_env, cpu_A0);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env);
break; break;
case 0x2c: /* frstor mem */ case 0x2c: /* frstor mem */
gen_update_cc_op(s); gen_update_cc_op(s);
@ -6251,21 +6254,25 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fbld_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fbld_ST0(tcg_ctx, cpu_env, cpu_A0);
fpu_update_ip(env);
break; break;
case 0x3e: /* fbstp */ case 0x3e: /* fbstp */
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fbst_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fbst_ST0(tcg_ctx, cpu_env, cpu_A0);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env);
break; break;
case 0x3d: /* fildll */ case 0x3d: /* fildll */
tcg_gen_qemu_ld_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ); tcg_gen_qemu_ld_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
gen_helper_fildll_ST0(tcg_ctx, cpu_env, cpu_tmp1_i64); gen_helper_fildll_ST0(tcg_ctx, cpu_env, cpu_tmp1_i64);
fpu_update_ip(env);
break; break;
case 0x3f: /* fistpll */ case 0x3f: /* fistpll */
gen_helper_fistll_ST0(tcg_ctx, cpu_tmp1_i64, cpu_env); gen_helper_fistll_ST0(tcg_ctx, cpu_tmp1_i64, cpu_env);
tcg_gen_qemu_st_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ); tcg_gen_qemu_st_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env);
break; break;
default: default:
goto illegal_op; goto illegal_op;
@ -6580,6 +6587,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
default: default:
goto illegal_op; goto illegal_op;
} }
fpu_update_ip(env);
} }
break; break;
/************************/ /************************/