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renames the register constants so unicorn and capstone can compile together

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mothran
2015-08-23 21:36:33 -07:00
parent 3e5ebc58a0
commit a167f7c456
29 changed files with 4130 additions and 4128 deletions
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242
include/unicorn/arm.h
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@ -13,131 +13,131 @@ extern "C" {
#endif
//> ARM registers
typedef enum arm_reg {
ARM_REG_INVALID = 0,
ARM_REG_APSR,
ARM_REG_APSR_NZCV,
ARM_REG_CPSR,
ARM_REG_FPEXC,
ARM_REG_FPINST,
ARM_REG_FPSCR,
ARM_REG_FPSCR_NZCV,
ARM_REG_FPSID,
ARM_REG_ITSTATE,
ARM_REG_LR,
ARM_REG_PC,
ARM_REG_SP,
ARM_REG_SPSR,
ARM_REG_D0,
ARM_REG_D1,
ARM_REG_D2,
ARM_REG_D3,
ARM_REG_D4,
ARM_REG_D5,
ARM_REG_D6,
ARM_REG_D7,
ARM_REG_D8,
ARM_REG_D9,
ARM_REG_D10,
ARM_REG_D11,
ARM_REG_D12,
ARM_REG_D13,
ARM_REG_D14,
ARM_REG_D15,
ARM_REG_D16,
ARM_REG_D17,
ARM_REG_D18,
ARM_REG_D19,
ARM_REG_D20,
ARM_REG_D21,
ARM_REG_D22,
ARM_REG_D23,
ARM_REG_D24,
ARM_REG_D25,
ARM_REG_D26,
ARM_REG_D27,
ARM_REG_D28,
ARM_REG_D29,
ARM_REG_D30,
ARM_REG_D31,
ARM_REG_FPINST2,
ARM_REG_MVFR0,
ARM_REG_MVFR1,
ARM_REG_MVFR2,
ARM_REG_Q0,
ARM_REG_Q1,
ARM_REG_Q2,
ARM_REG_Q3,
ARM_REG_Q4,
ARM_REG_Q5,
ARM_REG_Q6,
ARM_REG_Q7,
ARM_REG_Q8,
ARM_REG_Q9,
ARM_REG_Q10,
ARM_REG_Q11,
ARM_REG_Q12,
ARM_REG_Q13,
ARM_REG_Q14,
ARM_REG_Q15,
ARM_REG_R0,
ARM_REG_R1,
ARM_REG_R2,
ARM_REG_R3,
ARM_REG_R4,
ARM_REG_R5,
ARM_REG_R6,
ARM_REG_R7,
ARM_REG_R8,
ARM_REG_R9,
ARM_REG_R10,
ARM_REG_R11,
ARM_REG_R12,
ARM_REG_S0,
ARM_REG_S1,
ARM_REG_S2,
ARM_REG_S3,
ARM_REG_S4,
ARM_REG_S5,
ARM_REG_S6,
ARM_REG_S7,
ARM_REG_S8,
ARM_REG_S9,
ARM_REG_S10,
ARM_REG_S11,
ARM_REG_S12,
ARM_REG_S13,
ARM_REG_S14,
ARM_REG_S15,
ARM_REG_S16,
ARM_REG_S17,
ARM_REG_S18,
ARM_REG_S19,
ARM_REG_S20,
ARM_REG_S21,
ARM_REG_S22,
ARM_REG_S23,
ARM_REG_S24,
ARM_REG_S25,
ARM_REG_S26,
ARM_REG_S27,
ARM_REG_S28,
ARM_REG_S29,
ARM_REG_S30,
ARM_REG_S31,
typedef enum uc_arm_reg {
UC_ARM_REG_INVALID = 0,
UC_ARM_REG_APSR,
UC_ARM_REG_APSR_NZCV,
UC_ARM_REG_CPSR,
UC_ARM_REG_FPEXC,
UC_ARM_REG_FPINST,
UC_ARM_REG_FPSCR,
UC_ARM_REG_FPSCR_NZCV,
UC_ARM_REG_FPSID,
UC_ARM_REG_ITSTATE,
UC_ARM_REG_LR,
UC_ARM_REG_PC,
UC_ARM_REG_SP,
UC_ARM_REG_SPSR,
UC_ARM_REG_D0,
UC_ARM_REG_D1,
UC_ARM_REG_D2,
UC_ARM_REG_D3,
UC_ARM_REG_D4,
UC_ARM_REG_D5,
UC_ARM_REG_D6,
UC_ARM_REG_D7,
UC_ARM_REG_D8,
UC_ARM_REG_D9,
UC_ARM_REG_D10,
UC_ARM_REG_D11,
UC_ARM_REG_D12,
UC_ARM_REG_D13,
UC_ARM_REG_D14,
UC_ARM_REG_D15,
UC_ARM_REG_D16,
UC_ARM_REG_D17,
UC_ARM_REG_D18,
UC_ARM_REG_D19,
UC_ARM_REG_D20,
UC_ARM_REG_D21,
UC_ARM_REG_D22,
UC_ARM_REG_D23,
UC_ARM_REG_D24,
UC_ARM_REG_D25,
UC_ARM_REG_D26,
UC_ARM_REG_D27,
UC_ARM_REG_D28,
UC_ARM_REG_D29,
UC_ARM_REG_D30,
UC_ARM_REG_D31,
UC_ARM_REG_FPINST2,
UC_ARM_REG_MVFR0,
UC_ARM_REG_MVFR1,
UC_ARM_REG_MVFR2,
UC_ARM_REG_Q0,
UC_ARM_REG_Q1,
UC_ARM_REG_Q2,
UC_ARM_REG_Q3,
UC_ARM_REG_Q4,
UC_ARM_REG_Q5,
UC_ARM_REG_Q6,
UC_ARM_REG_Q7,
UC_ARM_REG_Q8,
UC_ARM_REG_Q9,
UC_ARM_REG_Q10,
UC_ARM_REG_Q11,
UC_ARM_REG_Q12,
UC_ARM_REG_Q13,
UC_ARM_REG_Q14,
UC_ARM_REG_Q15,
UC_ARM_REG_R0,
UC_ARM_REG_R1,
UC_ARM_REG_R2,
UC_ARM_REG_R3,
UC_ARM_REG_R4,
UC_ARM_REG_R5,
UC_ARM_REG_R6,
UC_ARM_REG_R7,
UC_ARM_REG_R8,
UC_ARM_REG_R9,
UC_ARM_REG_R10,
UC_ARM_REG_R11,
UC_ARM_REG_R12,
UC_ARM_REG_S0,
UC_ARM_REG_S1,
UC_ARM_REG_S2,
UC_ARM_REG_S3,
UC_ARM_REG_S4,
UC_ARM_REG_S5,
UC_ARM_REG_S6,
UC_ARM_REG_S7,
UC_ARM_REG_S8,
UC_ARM_REG_S9,
UC_ARM_REG_S10,
UC_ARM_REG_S11,
UC_ARM_REG_S12,
UC_ARM_REG_S13,
UC_ARM_REG_S14,
UC_ARM_REG_S15,
UC_ARM_REG_S16,
UC_ARM_REG_S17,
UC_ARM_REG_S18,
UC_ARM_REG_S19,
UC_ARM_REG_S20,
UC_ARM_REG_S21,
UC_ARM_REG_S22,
UC_ARM_REG_S23,
UC_ARM_REG_S24,
UC_ARM_REG_S25,
UC_ARM_REG_S26,
UC_ARM_REG_S27,
UC_ARM_REG_S28,
UC_ARM_REG_S29,
UC_ARM_REG_S30,
UC_ARM_REG_S31,
ARM_REG_ENDING, // <-- mark the end of the list or registers
UC_ARM_REG_ENDING, // <-- mark the end of the list or registers
//> alias registers
ARM_REG_R13 = ARM_REG_SP,
ARM_REG_R14 = ARM_REG_LR,
ARM_REG_R15 = ARM_REG_PC,
UC_ARM_REG_R13 = UC_ARM_REG_SP,
UC_ARM_REG_R14 = UC_ARM_REG_LR,
UC_ARM_REG_R15 = UC_ARM_REG_PC,
ARM_REG_SB = ARM_REG_R9,
ARM_REG_SL = ARM_REG_R10,
ARM_REG_FP = ARM_REG_R11,
ARM_REG_IP = ARM_REG_R12,
} arm_reg;
UC_ARM_REG_SB = UC_ARM_REG_R9,
UC_ARM_REG_SL = UC_ARM_REG_R10,
UC_ARM_REG_FP = UC_ARM_REG_R11,
UC_ARM_REG_IP = UC_ARM_REG_R12,
} uc_arm_reg;
#ifdef __cplusplus
}