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import Unicorn2

Browse Source
This commit is contained in:
Nguyen Anh Quynh
2021-10-03 22:14:44 +08:00
parent 772558119a
commit aaaea14214
837 changed files with 368717 additions and 200912 deletions
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48
bindings/pascal/unicorn/PpcConst.pas Normal file
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@ -0,0 +1,48 @@
// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT
unit PpcConst;
interface
const
// PPC registers
UC_PPC_REG_INVALID = 0;
// General purpose registers
UC_PPC_REG_PC = 1;
UC_PPC_REG_0 = 2;
UC_PPC_REG_1 = 3;
UC_PPC_REG_2 = 4;
UC_PPC_REG_3 = 5;
UC_PPC_REG_4 = 6;
UC_PPC_REG_5 = 7;
UC_PPC_REG_6 = 8;
UC_PPC_REG_7 = 9;
UC_PPC_REG_8 = 10;
UC_PPC_REG_9 = 11;
UC_PPC_REG_10 = 12;
UC_PPC_REG_11 = 13;
UC_PPC_REG_12 = 14;
UC_PPC_REG_13 = 15;
UC_PPC_REG_14 = 16;
UC_PPC_REG_15 = 17;
UC_PPC_REG_16 = 18;
UC_PPC_REG_17 = 19;
UC_PPC_REG_18 = 20;
UC_PPC_REG_19 = 21;
UC_PPC_REG_20 = 22;
UC_PPC_REG_21 = 23;
UC_PPC_REG_22 = 24;
UC_PPC_REG_23 = 25;
UC_PPC_REG_24 = 26;
UC_PPC_REG_25 = 27;
UC_PPC_REG_26 = 28;
UC_PPC_REG_27 = 29;
UC_PPC_REG_28 = 30;
UC_PPC_REG_29 = 31;
UC_PPC_REG_30 = 32;
UC_PPC_REG_31 = 33;
implementation
end.

150
bindings/pascal/unicorn/RiscvConst.pas Normal file
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@ -0,0 +1,150 @@
// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT
unit RiscvConst;
interface
const
// RISCV registers
UC_RISCV_REG_INVALID = 0;
// General purpose registers
UC_RISCV_REG_X0 = 1;
UC_RISCV_REG_X1 = 2;
UC_RISCV_REG_X2 = 3;
UC_RISCV_REG_X3 = 4;
UC_RISCV_REG_X4 = 5;
UC_RISCV_REG_X5 = 6;
UC_RISCV_REG_X6 = 7;
UC_RISCV_REG_X7 = 8;
UC_RISCV_REG_X8 = 9;
UC_RISCV_REG_X9 = 10;
UC_RISCV_REG_X10 = 11;
UC_RISCV_REG_X11 = 12;
UC_RISCV_REG_X12 = 13;
UC_RISCV_REG_X13 = 14;
UC_RISCV_REG_X14 = 15;
UC_RISCV_REG_X15 = 16;
UC_RISCV_REG_X16 = 17;
UC_RISCV_REG_X17 = 18;
UC_RISCV_REG_X18 = 19;
UC_RISCV_REG_X19 = 20;
UC_RISCV_REG_X20 = 21;
UC_RISCV_REG_X21 = 22;
UC_RISCV_REG_X22 = 23;
UC_RISCV_REG_X23 = 24;
UC_RISCV_REG_X24 = 25;
UC_RISCV_REG_X25 = 26;
UC_RISCV_REG_X26 = 27;
UC_RISCV_REG_X27 = 28;
UC_RISCV_REG_X28 = 29;
UC_RISCV_REG_X29 = 30;
UC_RISCV_REG_X30 = 31;
UC_RISCV_REG_X31 = 32;
// Floating-point registers
UC_RISCV_REG_F0 = 33;
UC_RISCV_REG_F1 = 34;
UC_RISCV_REG_F2 = 35;
UC_RISCV_REG_F3 = 36;
UC_RISCV_REG_F4 = 37;
UC_RISCV_REG_F5 = 38;
UC_RISCV_REG_F6 = 39;
UC_RISCV_REG_F7 = 40;
UC_RISCV_REG_F8 = 41;
UC_RISCV_REG_F9 = 42;
UC_RISCV_REG_F10 = 43;
UC_RISCV_REG_F11 = 44;
UC_RISCV_REG_F12 = 45;
UC_RISCV_REG_F13 = 46;
UC_RISCV_REG_F14 = 47;
UC_RISCV_REG_F15 = 48;
UC_RISCV_REG_F16 = 49;
UC_RISCV_REG_F17 = 50;
UC_RISCV_REG_F18 = 51;
UC_RISCV_REG_F19 = 52;
UC_RISCV_REG_F20 = 53;
UC_RISCV_REG_F21 = 54;
UC_RISCV_REG_F22 = 55;
UC_RISCV_REG_F23 = 56;
UC_RISCV_REG_F24 = 57;
UC_RISCV_REG_F25 = 58;
UC_RISCV_REG_F26 = 59;
UC_RISCV_REG_F27 = 60;
UC_RISCV_REG_F28 = 61;
UC_RISCV_REG_F29 = 62;
UC_RISCV_REG_F30 = 63;
UC_RISCV_REG_F31 = 64;
UC_RISCV_REG_PC = 65;
UC_RISCV_REG_ENDING = 66;
// Alias registers
UC_RISCV_REG_ZERO = 1;
UC_RISCV_REG_RA = 2;
UC_RISCV_REG_SP = 3;
UC_RISCV_REG_GP = 4;
UC_RISCV_REG_TP = 5;
UC_RISCV_REG_T0 = 6;
UC_RISCV_REG_T1 = 7;
UC_RISCV_REG_T2 = 8;
UC_RISCV_REG_S0 = 9;
UC_RISCV_REG_FP = 9;
UC_RISCV_REG_S1 = 10;
UC_RISCV_REG_A0 = 11;
UC_RISCV_REG_A1 = 12;
UC_RISCV_REG_A2 = 13;
UC_RISCV_REG_A3 = 14;
UC_RISCV_REG_A4 = 15;
UC_RISCV_REG_A5 = 16;
UC_RISCV_REG_A6 = 17;
UC_RISCV_REG_A7 = 18;
UC_RISCV_REG_S2 = 19;
UC_RISCV_REG_S3 = 20;
UC_RISCV_REG_S4 = 21;
UC_RISCV_REG_S5 = 22;
UC_RISCV_REG_S6 = 23;
UC_RISCV_REG_S7 = 24;
UC_RISCV_REG_S8 = 25;
UC_RISCV_REG_S9 = 26;
UC_RISCV_REG_S10 = 27;
UC_RISCV_REG_S11 = 28;
UC_RISCV_REG_T3 = 29;
UC_RISCV_REG_T4 = 30;
UC_RISCV_REG_T5 = 31;
UC_RISCV_REG_T6 = 32;
UC_RISCV_REG_FT0 = 33;
UC_RISCV_REG_FT1 = 34;
UC_RISCV_REG_FT2 = 35;
UC_RISCV_REG_FT3 = 36;
UC_RISCV_REG_FT4 = 37;
UC_RISCV_REG_FT5 = 38;
UC_RISCV_REG_FT6 = 39;
UC_RISCV_REG_FT7 = 40;
UC_RISCV_REG_FS0 = 41;
UC_RISCV_REG_FS1 = 42;
UC_RISCV_REG_FA0 = 43;
UC_RISCV_REG_FA1 = 44;
UC_RISCV_REG_FA2 = 45;
UC_RISCV_REG_FA3 = 46;
UC_RISCV_REG_FA4 = 47;
UC_RISCV_REG_FA5 = 48;
UC_RISCV_REG_FA6 = 49;
UC_RISCV_REG_FA7 = 50;
UC_RISCV_REG_FS2 = 51;
UC_RISCV_REG_FS3 = 52;
UC_RISCV_REG_FS4 = 53;
UC_RISCV_REG_FS5 = 54;
UC_RISCV_REG_FS6 = 55;
UC_RISCV_REG_FS7 = 56;
UC_RISCV_REG_FS8 = 57;
UC_RISCV_REG_FS9 = 58;
UC_RISCV_REG_FS10 = 59;
UC_RISCV_REG_FS11 = 60;
UC_RISCV_REG_FT8 = 61;
UC_RISCV_REG_FT9 = 62;
UC_RISCV_REG_FT10 = 63;
UC_RISCV_REG_FT11 = 64;
implementation
end.

13
bindings/pascal/unicorn/UnicornConst.pas
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@ -4,13 +4,14 @@ unit UnicornConst;
interface
const UC_API_MAJOR = 1;
const UC_API_MAJOR = 2;
UC_API_MINOR = 0;
UC_VERSION_MAJOR = 1;
UC_VERSION_MAJOR = 2;
UC_VERSION_MINOR = 0;
UC_VERSION_EXTRA = 3;
UC_VERSION_EXTRA = 0;
UC_SECOND_SCALE = 1000000;
UC_MILISECOND_SCALE = 1000;
UC_ARCH_ARM = 1;
@ -20,7 +21,8 @@ const UC_API_MAJOR = 1;
UC_ARCH_PPC = 5;
UC_ARCH_SPARC = 6;
UC_ARCH_M68K = 7;
UC_ARCH_MAX = 8;
UC_ARCH_RISCV = 8;
UC_ARCH_MAX = 9;
UC_MODE_LITTLE_ENDIAN = 0;
UC_MODE_BIG_ENDIAN = 1073741824;
@ -32,7 +34,6 @@ const UC_API_MAJOR = 1;
UC_MODE_ARM926 = 128;
UC_MODE_ARM946 = 256;
UC_MODE_ARM1176 = 512;
UC_MODE_ARMBE8 = 1024;
UC_MODE_MICRO = 16;
UC_MODE_MIPS3 = 32;
UC_MODE_MIPS32R6 = 64;
@ -47,6 +48,8 @@ const UC_API_MAJOR = 1;
UC_MODE_SPARC32 = 4;
UC_MODE_SPARC64 = 8;
UC_MODE_V9 = 16;
UC_MODE_RISCV32 = 4;
UC_MODE_RISCV64 = 8;
UC_ERR_OK = 0;
UC_ERR_NOMEM = 1;

2
bindings/pascal/unicorn/Unicorn_dyn.pas
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@ -108,7 +108,7 @@ type
@user_data: user data passed to tracing APIs
@return: return true to continue, or false to stop program (due to invalid memory).
NOTE: returning true to continue execution will only work if the accessed
NOTE: returning true to continue execution will only work if if the accessed
memory is made accessible with the correct permissions during the hook.
In the event of a UC_MEM_READ_UNMAPPED or UC_MEM_WRITE_UNMAPPED callback,