import Unicorn2
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#![allow(non_camel_case_types)]
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use bitflags::bitflags;
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pub const API_MAJOR: u64 = 1;
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pub const API_MINOR: u64 = 0;
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pub const VERSION_MAJOR: u64 = 1;
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pub const VERSION_MINOR: u64 = 0;
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pub const VERSION_EXTRA: u64 = 2;
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pub const SECOND_SCALE: u64 = 1_000_000;
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pub const MILISECOND_SCALE: u64 = 1_000;
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#[repr(C)]
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#[derive(PartialEq, Debug, Clone, Copy)]
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pub enum uc_error {
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OK = 0,
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NOMEM = 1,
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ARCH = 2,
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HANDLE = 3,
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MODE = 4,
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VERSION = 5,
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READ_UNMAPPED = 6,
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WRITE_UNMAPPED = 7,
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FETCH_UNMAPPED = 8,
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HOOK = 9,
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INSN_INVALID = 10,
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MAP = 11,
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WRITE_PROT = 12,
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READ_PROT = 13,
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FETCH_PROT = 14,
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ARG = 15,
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READ_UNALIGNED = 16,
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WRITE_UNALIGNED = 17,
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FETCH_UNALIGNED = 18,
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HOOK_EXIST = 19,
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RESOURCE = 20,
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EXCEPTION = 21,
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}
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#[repr(C)]
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#[derive(PartialEq, Debug, Clone, Copy)]
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pub enum MemType {
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READ = 16,
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WRITE = 17,
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FETCH = 18,
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READ_UNMAPPED = 19,
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WRITE_UNMAPPED = 20,
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FETCH_UNMAPPED = 21,
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WRITE_PROT = 22,
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READ_PROT = 23,
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FETCH_PROT = 24,
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READ_AFTER = 25,
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}
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bitflags! {
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#[repr(C)]
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pub struct HookType: i32 {
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const INTR = 1;
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const INSN = 2;
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const CODE = 4;
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const BLOCK = 8;
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const MEM_READ_UNMAPPED = 0x10;
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const MEM_WRITE_UNMAPPED = 0x20;
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const MEM_FETCH_UNMAPPED = 0x40;
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const MEM_UNMAPPED = Self::MEM_READ_UNMAPPED.bits | Self::MEM_WRITE_UNMAPPED.bits | Self::MEM_FETCH_UNMAPPED.bits;
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const MEM_READ_PROT = 0x80;
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const MEM_WRITE_PROT = 0x100;
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const MEM_FETCH_PROT = 0x200;
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const MEM_PROT = Self::MEM_READ_PROT.bits | Self::MEM_WRITE_PROT.bits | Self::MEM_FETCH_PROT.bits;
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const MEM_READ = 0x400;
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const MEM_WRITE = 0x800;
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const MEM_FETCH = 0x1000;
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const MEM_VALID = Self::MEM_READ.bits | Self::MEM_WRITE.bits | Self::MEM_FETCH.bits;
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const MEM_READ_AFTER = 0x2000;
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const INSN_INVALID = 0x4000;
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const MEM_READ_INVALID = Self::MEM_READ_UNMAPPED.bits | Self::MEM_READ_PROT.bits;
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const MEM_WRITE_INVALID = Self::MEM_WRITE_UNMAPPED.bits | Self::MEM_WRITE_PROT.bits;
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const MEM_FETCH_INVALID = Self::MEM_FETCH_UNMAPPED.bits | Self::MEM_FETCH_PROT.bits;
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const MEM_INVALID = Self::MEM_READ_INVALID.bits | Self::MEM_WRITE_INVALID.bits | Self::MEM_FETCH_INVALID.bits;
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const MEM_ALL = Self::MEM_VALID.bits | Self::MEM_INVALID.bits;
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}
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}
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#[repr(C)]
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#[derive(PartialEq, Debug, Clone, Copy)]
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pub enum Query {
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MODE = 1,
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PAGE_SIZE = 2,
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ARCH = 3,
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}
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bitflags! {
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#[repr(C)]
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pub struct Permission : u32 {
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const NONE = 0;
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const READ = 1;
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const WRITE = 2;
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const EXEC = 4;
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const ALL = Self::READ.bits | Self::WRITE.bits | Self::EXEC.bits;
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}
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}
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#[repr(C)]
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#[derive(Debug, Clone)]
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pub struct MemRegion {
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pub begin: u64,
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pub end: u64,
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pub perms: Permission,
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}
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#[repr(C)]
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#[derive(PartialEq, Debug, Clone, Copy)]
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pub enum Arch {
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ARM = 1,
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ARM64 = 2,
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MIPS = 3,
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X86 = 4,
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PPC = 5,
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SPARC = 6,
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M68K = 7,
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MAX = 8,
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}
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bitflags! {
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#[repr(C)]
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pub struct Mode: i32 {
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const LITTLE_ENDIAN = 0;
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const BIG_ENDIAN = 0x4000_0000;
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const ARM = 0;
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const THUMB = 0x10;
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const MCLASS = 0x20;
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const V8 = 0x40;
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const ARM926 = 0x80;
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const ARM946 = 0x100;
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const ARM1176 = 0x200;
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const MICRO = Self::THUMB.bits;
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const MIPS3 = Self::MCLASS.bits;
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const MIPS32R6 = Self::V8.bits;
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const MIPS32 = 4;
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const MIPS64 = 8;
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const MODE_16 = 2;
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const MODE_32 = Self::MIPS32.bits;
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const MODE_64 = Self::MIPS64.bits;
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const PPC32 = Self::MIPS32.bits;
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const PPC64 = Self::MIPS64.bits;
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const QPX = Self::THUMB.bits;
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const SPARC32 = Self::MIPS32.bits;
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const SPARC64 = Self::MIPS64.bits;
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const V9 = Self::THUMB.bits;
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}
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}
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