From ae6e3c193d569180c6ada3ac2b01c11aef34e714 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Mon, 3 Jun 2019 04:04:41 -0700 Subject: [PATCH] Fixes register reading and writing for XMM8-15 on x86-64 (#1090) --- qemu/target-i386/unicorn.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c index f7ded40e..d194167d 100644 --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -767,6 +767,21 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun case UC_X86_REG_MXCSR: *(uint32_t *)value = X86_CPU(uc, mycpu)->env.mxcsr; break; + case UC_X86_REG_XMM8: + case UC_X86_REG_XMM9: + case UC_X86_REG_XMM10: + case UC_X86_REG_XMM11: + case UC_X86_REG_XMM12: + case UC_X86_REG_XMM13: + case UC_X86_REG_XMM14: + case UC_X86_REG_XMM15: + { + float64 *dst = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + dst[0] = reg->_d[0]; + dst[1] = reg->_d[1]; + break; + } } break; #endif @@ -1338,6 +1353,21 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i case UC_X86_REG_MXCSR: cpu_set_mxcsr(&X86_CPU(uc, mycpu)->env, *(uint32_t *)value); break; + case UC_X86_REG_XMM8: + case UC_X86_REG_XMM9: + case UC_X86_REG_XMM10: + case UC_X86_REG_XMM11: + case UC_X86_REG_XMM12: + case UC_X86_REG_XMM13: + case UC_X86_REG_XMM14: + case UC_X86_REG_XMM15: + { + float64 *src = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + reg->_d[0] = src[0]; + reg->_d[1] = src[1]; + break; + } } break; #endif