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Fix fpip (#1385)

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* Revert partial #74

* Import fix from https://lists.nongnu.org/archive/html/qemu-devel/2021-04/msg02868.html

* Fix capstone usage
This commit is contained in:
lazymio
2021-04-26 00:32:42 +08:00
committed by GitHub
parent 811e77c7aa
commit b0f1e46f61
2 changed files with 9 additions and 15 deletions
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22
qemu/target-i386/translate.c
View File

@ -314,11 +314,6 @@ static void gen_update_cc_op(DisasContext *s)
} }
} }
static void fpu_update_ip(CPUX86State *env, target_ulong pc)
{
env->fpip = pc;
}
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
#define NB_OP_SIZES 4 #define NB_OP_SIZES 4
@ -6401,7 +6396,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
/* fcomp needs pop */ /* fcomp needs pop */
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
} }
fpu_update_ip(env, pc_start);
} }
else if((op == 0x08) || /* flds */ else if((op == 0x08) || /* flds */
(op == 0x0a) || /* fsts */ (op == 0x0a) || /* fsts */
@ -6486,7 +6480,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
break; break;
} }
fpu_update_ip(env, pc_start);
} }
else if(op == 0x0c) /* fldenv mem */ else if(op == 0x0c) /* fldenv mem */
{ {
@ -6517,7 +6510,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fldt_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fldt_ST0(tcg_ctx, cpu_env, cpu_A0);
fpu_update_ip(env, pc_start);
} }
else if(op == 0x1f) /* fstpt mem */ else if(op == 0x1f) /* fstpt mem */
{ {
@ -6525,7 +6517,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fstt_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fstt_ST0(tcg_ctx, cpu_env, cpu_A0);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env, pc_start);
} }
else if(op == 0x2c) /* frstor mem */ else if(op == 0x2c) /* frstor mem */
{ {
@ -6550,7 +6541,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fbld_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fbld_ST0(tcg_ctx, cpu_env, cpu_A0);
fpu_update_ip(env, pc_start);
} }
else if(op == 0x3e) /* fbstp */ else if(op == 0x3e) /* fbstp */
{ {
@ -6558,20 +6548,17 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_fbst_ST0(tcg_ctx, cpu_env, cpu_A0); gen_helper_fbst_ST0(tcg_ctx, cpu_env, cpu_A0);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env, pc_start);
} }
else if(op == 0x3d) /* fildll */ else if(op == 0x3d) /* fildll */
{ {
tcg_gen_qemu_ld_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ); tcg_gen_qemu_ld_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
gen_helper_fildll_ST0(tcg_ctx, cpu_env, cpu_tmp1_i64); gen_helper_fildll_ST0(tcg_ctx, cpu_env, cpu_tmp1_i64);
fpu_update_ip(env, pc_start);
} }
else if(op == 0x3f) /* fistpll */ else if(op == 0x3f) /* fistpll */
{ {
gen_helper_fistll_ST0(tcg_ctx, cpu_tmp1_i64, cpu_env); gen_helper_fistll_ST0(tcg_ctx, cpu_tmp1_i64, cpu_env);
tcg_gen_qemu_st_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ); tcg_gen_qemu_st_i64(s->uc, cpu_tmp1_i64, cpu_A0, s->mem_index, MO_LEQ);
gen_helper_fpop(tcg_ctx, cpu_env); gen_helper_fpop(tcg_ctx, cpu_env);
fpu_update_ip(env, pc_start);
} }
else else
{ {
@ -6887,8 +6874,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
default: default:
goto illegal_op; goto illegal_op;
} }
fpu_update_ip(env, pc_start);
} }
tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tmp0, pc_start - s->cs_base);
tcg_gen_st_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tmp0, cpu_env, offsetof(CPUX86State, fpip));
break; break;
/************************/ /************************/
/* string ops */ /* string ops */
@ -8766,6 +8754,12 @@ static inline void gen_intermediate_code_internal(uint8_t *gen_opc_cc_op,
block_full = true; block_full = true;
break; break;
} }
/*
gen_jmp_im(dc, pc_ptr - dc->cs_base);
gen_eob(dc);
block_full = true;
break;
*/
} }
//if (tb->cflags & CF_LAST_IO) //if (tb->cflags & CF_LAST_IO)
// gen_io_end(); // gen_io_end();

2
tests/regress/fpu_ip.py
View File

@ -28,7 +28,7 @@ disasm = SimpleEngine()
def hook_code(uc, addr, size, user_data): def hook_code(uc, addr, size, user_data):
mem = uc.mem_read(addr, size) mem = uc.mem_read(addr, size)
print(" 0x%X:" % (addr)), print(" 0x%X:" % (addr)),
disasm.disas_single(str(mem)) disasm.disas_single(bytes(mem))
class FpuIP(regress.RegressTest): class FpuIP(regress.RegressTest):