From bb34eebd24cde01804977f633a5fdaaed116c874 Mon Sep 17 00:00:00 2001
From: Nguyen Anh Quynh <aquynh@gmail.com>
Date: Mon, 24 Aug 2015 09:50:55 +0800
Subject: [PATCH] verify hardware mode for ARM. this fixes issue #16

---
 regress/wrong_sp_arm.py | 21 +++++++++++++++++----
 uc.c                    |  8 ++++++++
 2 files changed, 25 insertions(+), 4 deletions(-)
 mode change 100644 => 100755 regress/wrong_sp_arm.py

diff --git a/regress/wrong_sp_arm.py b/regress/wrong_sp_arm.py
old mode 100644
new mode 100755
index a5d21838..9886192a
--- a/regress/wrong_sp_arm.py
+++ b/regress/wrong_sp_arm.py
@@ -3,7 +3,20 @@
 
 from unicorn import *
 from unicorn.arm_const import *
-uc = Uc(UC_ARCH_ARM, UC_MODE_32)
-uc.reg_write(ARM_REG_SP, 4)
-print 'Writing 4 to SP'
-print 'SP =', uc.reg_read(ARM_REG_SP)
+
+try:
+    uc = Uc(UC_ARCH_ARM, UC_MODE_32)
+    uc.reg_write(ARM_REG_SP, 4)
+    print 'Writing 4 to SP'
+    print 'SP =', uc.reg_read(ARM_REG_SP)
+except UcError as e:
+    print("ERROR: %s" % e)
+
+try:
+    print "==========="
+    uc = Uc(UC_ARCH_ARM, UC_MODE_ARM)
+    uc.reg_write(ARM_REG_SP, 4)
+    print 'Writing 4 to SP'
+    print 'SP =', uc.reg_read(ARM_REG_SP)
+except UcError as e:
+    print("ERROR: %s" % e)
diff --git a/uc.c b/uc.c
index 264bf40a..0ac47d69 100644
--- a/uc.c
+++ b/uc.c
@@ -177,6 +177,14 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uch *handle)
 #ifdef UNICORN_HAS_ARM
             case UC_ARCH_ARM:
                 uc->init_arch = arm_uc_init;
+
+                // verify mode
+                if (mode != UC_MODE_ARM && mode != UC_MODE_THUMB) {
+                    *handle = 0;
+                    free(uc);
+                    return UC_ERR_MODE;
+                }
+
                 if (mode == UC_MODE_THUMB)
                     uc->thumb = 1;
                 break;