From c2bb5c883878203fb3fa3155f7352b4f4c5992f1 Mon Sep 17 00:00:00 2001 From: lazymio Date: Sat, 12 Feb 2022 14:29:42 +0100 Subject: [PATCH] Fix ns and s in cp reg encoding --- qemu/target/arm/unicorn_arm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/qemu/target/arm/unicorn_arm.c b/qemu/target/arm/unicorn_arm.c index a97f9427..51d3e2d2 100644 --- a/qemu/target/arm/unicorn_arm.c +++ b/qemu/target/arm/unicorn_arm.c @@ -150,8 +150,9 @@ static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask, uint32_t reg, static uc_err read_cp_reg(CPUARMState *env, uc_arm_cp_reg *cp) { ARMCPU *cpu = ARM_CPU(env->uc->cpu); + int ns = cp->sec ? 0 : 1; const ARMCPRegInfo *ri = get_arm_cp_reginfo( - cpu->cp_regs, ENCODE_CP_REG(cp->cp, cp->is64, cp->sec, cp->crn, cp->crm, + cpu->cp_regs, ENCODE_CP_REG(cp->cp, cp->is64, ns, cp->crn, cp->crm, cp->opc1, cp->opc2)); if (!ri) { @@ -170,8 +171,9 @@ static uc_err read_cp_reg(CPUARMState *env, uc_arm_cp_reg *cp) static uc_err write_cp_reg(CPUARMState *env, uc_arm_cp_reg *cp) { ARMCPU *cpu = ARM_CPU(env->uc->cpu); + int ns = cp->sec ? 0 : 1; const ARMCPRegInfo *ri = get_arm_cp_reginfo( - cpu->cp_regs, ENCODE_CP_REG(cp->cp, cp->is64, cp->sec, cp->crn, cp->crm, + cpu->cp_regs, ENCODE_CP_REG(cp->cp, cp->is64, ns, cp->crn, cp->crm, cp->opc1, cp->opc2)); if (!ri) {