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bindings: update ARM64 registers

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This commit is contained in:
Nguyen Anh Quynh
2020-05-10 21:51:14 +08:00
parent 149121539b
commit cf3451c37a
6 changed files with 192 additions and 6 deletions
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33
bindings/dotnet/UnicornManaged/Const/Arm64.fs
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@ -278,7 +278,38 @@ module Arm64 =
let UC_ARM64_REG_TPIDR_EL0 = 262 let UC_ARM64_REG_TPIDR_EL0 = 262
let UC_ARM64_REG_TPIDRRO_EL0 = 263 let UC_ARM64_REG_TPIDRRO_EL0 = 263
let UC_ARM64_REG_TPIDR_EL1 = 264 let UC_ARM64_REG_TPIDR_EL1 = 264
let UC_ARM64_REG_ENDING = 265 let UC_ARM64_REG_PSTATE = 265
// exception link registers
let UC_ARM64_REG_ELR_EL0 = 266
let UC_ARM64_REG_ELR_EL1 = 267
let UC_ARM64_REG_ELR_EL2 = 268
let UC_ARM64_REG_ELR_EL3 = 269
// stack pointers registers
let UC_ARM64_REG_SP_EL0 = 270
let UC_ARM64_REG_SP_EL1 = 271
let UC_ARM64_REG_SP_EL2 = 272
let UC_ARM64_REG_SP_EL3 = 273
// other CP15 registers
let UC_ARM64_REG_TTBR0_EL1 = 274
let UC_ARM64_REG_TTBR1_EL1 = 275
let UC_ARM64_REG_ESR_EL0 = 276
let UC_ARM64_REG_ESR_EL1 = 277
let UC_ARM64_REG_ESR_EL2 = 278
let UC_ARM64_REG_ESR_EL3 = 279
let UC_ARM64_REG_FAR_EL0 = 280
let UC_ARM64_REG_FAR_EL1 = 281
let UC_ARM64_REG_FAR_EL2 = 282
let UC_ARM64_REG_FAR_EL3 = 283
let UC_ARM64_REG_PAR_EL1 = 284
let UC_ARM64_REG_MAIR_EL1 = 285
let UC_ARM64_REG_VBAR_EL0 = 286
let UC_ARM64_REG_VBAR_EL1 = 287
let UC_ARM64_REG_VBAR_EL2 = 288
let UC_ARM64_REG_VBAR_EL3 = 289
let UC_ARM64_REG_ENDING = 290
// alias registers // alias registers
let UC_ARM64_REG_IP0 = 215 let UC_ARM64_REG_IP0 = 215

33
bindings/go/unicorn/arm64_const.go
View File

@ -273,7 +273,38 @@ const (
ARM64_REG_TPIDR_EL0 = 262 ARM64_REG_TPIDR_EL0 = 262
ARM64_REG_TPIDRRO_EL0 = 263 ARM64_REG_TPIDRRO_EL0 = 263
ARM64_REG_TPIDR_EL1 = 264 ARM64_REG_TPIDR_EL1 = 264
ARM64_REG_ENDING = 265 ARM64_REG_PSTATE = 265
// exception link registers
ARM64_REG_ELR_EL0 = 266
ARM64_REG_ELR_EL1 = 267
ARM64_REG_ELR_EL2 = 268
ARM64_REG_ELR_EL3 = 269
// stack pointers registers
ARM64_REG_SP_EL0 = 270
ARM64_REG_SP_EL1 = 271
ARM64_REG_SP_EL2 = 272
ARM64_REG_SP_EL3 = 273
// other CP15 registers
ARM64_REG_TTBR0_EL1 = 274
ARM64_REG_TTBR1_EL1 = 275
ARM64_REG_ESR_EL0 = 276
ARM64_REG_ESR_EL1 = 277
ARM64_REG_ESR_EL2 = 278
ARM64_REG_ESR_EL3 = 279
ARM64_REG_FAR_EL0 = 280
ARM64_REG_FAR_EL1 = 281
ARM64_REG_FAR_EL2 = 282
ARM64_REG_FAR_EL3 = 283
ARM64_REG_PAR_EL1 = 284
ARM64_REG_MAIR_EL1 = 285
ARM64_REG_VBAR_EL0 = 286
ARM64_REG_VBAR_EL1 = 287
ARM64_REG_VBAR_EL2 = 288
ARM64_REG_VBAR_EL3 = 289
ARM64_REG_ENDING = 290
// alias registers // alias registers
ARM64_REG_IP0 = 215 ARM64_REG_IP0 = 215

33
bindings/java/unicorn/Arm64Const.java
View File

@ -275,7 +275,38 @@ public interface Arm64Const {
public static final int UC_ARM64_REG_TPIDR_EL0 = 262; public static final int UC_ARM64_REG_TPIDR_EL0 = 262;
public static final int UC_ARM64_REG_TPIDRRO_EL0 = 263; public static final int UC_ARM64_REG_TPIDRRO_EL0 = 263;
public static final int UC_ARM64_REG_TPIDR_EL1 = 264; public static final int UC_ARM64_REG_TPIDR_EL1 = 264;
public static final int UC_ARM64_REG_ENDING = 265; public static final int UC_ARM64_REG_PSTATE = 265;
// exception link registers
public static final int UC_ARM64_REG_ELR_EL0 = 266;
public static final int UC_ARM64_REG_ELR_EL1 = 267;
public static final int UC_ARM64_REG_ELR_EL2 = 268;
public static final int UC_ARM64_REG_ELR_EL3 = 269;
// stack pointers registers
public static final int UC_ARM64_REG_SP_EL0 = 270;
public static final int UC_ARM64_REG_SP_EL1 = 271;
public static final int UC_ARM64_REG_SP_EL2 = 272;
public static final int UC_ARM64_REG_SP_EL3 = 273;
// other CP15 registers
public static final int UC_ARM64_REG_TTBR0_EL1 = 274;
public static final int UC_ARM64_REG_TTBR1_EL1 = 275;
public static final int UC_ARM64_REG_ESR_EL0 = 276;
public static final int UC_ARM64_REG_ESR_EL1 = 277;
public static final int UC_ARM64_REG_ESR_EL2 = 278;
public static final int UC_ARM64_REG_ESR_EL3 = 279;
public static final int UC_ARM64_REG_FAR_EL0 = 280;
public static final int UC_ARM64_REG_FAR_EL1 = 281;
public static final int UC_ARM64_REG_FAR_EL2 = 282;
public static final int UC_ARM64_REG_FAR_EL3 = 283;
public static final int UC_ARM64_REG_PAR_EL1 = 284;
public static final int UC_ARM64_REG_MAIR_EL1 = 285;
public static final int UC_ARM64_REG_VBAR_EL0 = 286;
public static final int UC_ARM64_REG_VBAR_EL1 = 287;
public static final int UC_ARM64_REG_VBAR_EL2 = 288;
public static final int UC_ARM64_REG_VBAR_EL3 = 289;
public static final int UC_ARM64_REG_ENDING = 290;
// alias registers // alias registers
public static final int UC_ARM64_REG_IP0 = 215; public static final int UC_ARM64_REG_IP0 = 215;

33
bindings/pascal/unicorn/Arm64Const.pas
View File

@ -276,7 +276,38 @@ const
UC_ARM64_REG_TPIDR_EL0 = 262; UC_ARM64_REG_TPIDR_EL0 = 262;
UC_ARM64_REG_TPIDRRO_EL0 = 263; UC_ARM64_REG_TPIDRRO_EL0 = 263;
UC_ARM64_REG_TPIDR_EL1 = 264; UC_ARM64_REG_TPIDR_EL1 = 264;
UC_ARM64_REG_ENDING = 265; UC_ARM64_REG_PSTATE = 265;
// exception link registers
UC_ARM64_REG_ELR_EL0 = 266;
UC_ARM64_REG_ELR_EL1 = 267;
UC_ARM64_REG_ELR_EL2 = 268;
UC_ARM64_REG_ELR_EL3 = 269;
// stack pointers registers
UC_ARM64_REG_SP_EL0 = 270;
UC_ARM64_REG_SP_EL1 = 271;
UC_ARM64_REG_SP_EL2 = 272;
UC_ARM64_REG_SP_EL3 = 273;
// other CP15 registers
UC_ARM64_REG_TTBR0_EL1 = 274;
UC_ARM64_REG_TTBR1_EL1 = 275;
UC_ARM64_REG_ESR_EL0 = 276;
UC_ARM64_REG_ESR_EL1 = 277;
UC_ARM64_REG_ESR_EL2 = 278;
UC_ARM64_REG_ESR_EL3 = 279;
UC_ARM64_REG_FAR_EL0 = 280;
UC_ARM64_REG_FAR_EL1 = 281;
UC_ARM64_REG_FAR_EL2 = 282;
UC_ARM64_REG_FAR_EL3 = 283;
UC_ARM64_REG_PAR_EL1 = 284;
UC_ARM64_REG_MAIR_EL1 = 285;
UC_ARM64_REG_VBAR_EL0 = 286;
UC_ARM64_REG_VBAR_EL1 = 287;
UC_ARM64_REG_VBAR_EL2 = 288;
UC_ARM64_REG_VBAR_EL3 = 289;
UC_ARM64_REG_ENDING = 290;
// alias registers // alias registers
UC_ARM64_REG_IP0 = 215; UC_ARM64_REG_IP0 = 215;

33
bindings/python/unicorn/arm64_const.py
View File

@ -271,7 +271,38 @@ UC_ARM64_REG_CPACR_EL1 = 261
UC_ARM64_REG_TPIDR_EL0 = 262 UC_ARM64_REG_TPIDR_EL0 = 262
UC_ARM64_REG_TPIDRRO_EL0 = 263 UC_ARM64_REG_TPIDRRO_EL0 = 263
UC_ARM64_REG_TPIDR_EL1 = 264 UC_ARM64_REG_TPIDR_EL1 = 264
UC_ARM64_REG_ENDING = 265 UC_ARM64_REG_PSTATE = 265
# exception link registers
UC_ARM64_REG_ELR_EL0 = 266
UC_ARM64_REG_ELR_EL1 = 267
UC_ARM64_REG_ELR_EL2 = 268
UC_ARM64_REG_ELR_EL3 = 269
# stack pointers registers
UC_ARM64_REG_SP_EL0 = 270
UC_ARM64_REG_SP_EL1 = 271
UC_ARM64_REG_SP_EL2 = 272
UC_ARM64_REG_SP_EL3 = 273
# other CP15 registers
UC_ARM64_REG_TTBR0_EL1 = 274
UC_ARM64_REG_TTBR1_EL1 = 275
UC_ARM64_REG_ESR_EL0 = 276
UC_ARM64_REG_ESR_EL1 = 277
UC_ARM64_REG_ESR_EL2 = 278
UC_ARM64_REG_ESR_EL3 = 279
UC_ARM64_REG_FAR_EL0 = 280
UC_ARM64_REG_FAR_EL1 = 281
UC_ARM64_REG_FAR_EL2 = 282
UC_ARM64_REG_FAR_EL3 = 283
UC_ARM64_REG_PAR_EL1 = 284
UC_ARM64_REG_MAIR_EL1 = 285
UC_ARM64_REG_VBAR_EL0 = 286
UC_ARM64_REG_VBAR_EL1 = 287
UC_ARM64_REG_VBAR_EL2 = 288
UC_ARM64_REG_VBAR_EL3 = 289
UC_ARM64_REG_ENDING = 290
# alias registers # alias registers
UC_ARM64_REG_IP0 = 215 UC_ARM64_REG_IP0 = 215

33
bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb
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@ -273,7 +273,38 @@ module UnicornEngine
UC_ARM64_REG_TPIDR_EL0 = 262 UC_ARM64_REG_TPIDR_EL0 = 262
UC_ARM64_REG_TPIDRRO_EL0 = 263 UC_ARM64_REG_TPIDRRO_EL0 = 263
UC_ARM64_REG_TPIDR_EL1 = 264 UC_ARM64_REG_TPIDR_EL1 = 264
UC_ARM64_REG_ENDING = 265 UC_ARM64_REG_PSTATE = 265
# exception link registers
UC_ARM64_REG_ELR_EL0 = 266
UC_ARM64_REG_ELR_EL1 = 267
UC_ARM64_REG_ELR_EL2 = 268
UC_ARM64_REG_ELR_EL3 = 269
# stack pointers registers
UC_ARM64_REG_SP_EL0 = 270
UC_ARM64_REG_SP_EL1 = 271
UC_ARM64_REG_SP_EL2 = 272
UC_ARM64_REG_SP_EL3 = 273
# other CP15 registers
UC_ARM64_REG_TTBR0_EL1 = 274
UC_ARM64_REG_TTBR1_EL1 = 275
UC_ARM64_REG_ESR_EL0 = 276
UC_ARM64_REG_ESR_EL1 = 277
UC_ARM64_REG_ESR_EL2 = 278
UC_ARM64_REG_ESR_EL3 = 279
UC_ARM64_REG_FAR_EL0 = 280
UC_ARM64_REG_FAR_EL1 = 281
UC_ARM64_REG_FAR_EL2 = 282
UC_ARM64_REG_FAR_EL3 = 283
UC_ARM64_REG_PAR_EL1 = 284
UC_ARM64_REG_MAIR_EL1 = 285
UC_ARM64_REG_VBAR_EL0 = 286
UC_ARM64_REG_VBAR_EL1 = 287
UC_ARM64_REG_VBAR_EL2 = 288
UC_ARM64_REG_VBAR_EL3 = 289
UC_ARM64_REG_ENDING = 290
# alias registers # alias registers
UC_ARM64_REG_IP0 = 215 UC_ARM64_REG_IP0 = 215