c6db9febe7
added ARM64 hang test
2016-06-15 19:18:51 +02:00
93063d089b
Add ASAN build target with UNICORN_ASAN or via './make.sh asan'
2016-04-20 16:16:06 -07:00
ad6bb8c9f8
unit: fix test_hookcounts.c
2016-03-20 01:54:37 +08:00
0af4baac31
unit: fix warnings in printing uint64_t in test_hookcounts.c
2016-03-17 17:49:22 +08:00
ac21e74641
Issues #465
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Pull Request #466
Added one more test case
Fixed two test case into passing (for a total of 3 passing out of 7)
2016-03-16 11:49:25 -07:00
ab5ed15044
Issue #465 - Enhanced test for more scenarios; fixed some semantic bugs.
2016-03-16 10:54:20 -07:00
347d863365
Issue #465 hook_count_cb doesn't stop at n instructions; unit test file
2015-10-03 22:52:15 -07:00
1087ba9dea
[query] add UC_QUERY_PAGE_SIZE uc_query helper
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Return the current page size used by the current arch.
Useful to call uc_mem_map() with memory/size aligned.
Signed-off-by: Nicolas PLANEL <nplanel@redhat.com >
2016-03-04 15:54:24 +11:00
aabcb95f01
unit: remove ^M from test_x86_soft_paging.c
2016-02-22 14:02:28 +08:00
2f28f3f210
unit: make test_x86_soft_paging.c compilable. also update .gitignore for its binary
2016-02-22 14:01:00 +08:00
2ab2b229ce
test case: x86 guest paging
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Test case for x86 paging using virtual addresses mapped by Unicorn, as well as unmapped.
Attempting to read/write from virtual address ranges unmapped by Unicorn wrongly causes protection faults, even when the virtual address points to read/write regions of Unicorn memory.
2016-02-22 00:03:14 -05:00
871cdb692f
Merge branch 'hook'
2016-02-17 09:37:17 +08:00
bfbe91834e
two more testcases
2016-02-11 15:02:14 +01:00
a7a1dcc661
uc_hook_add(): add begin & end arguments for all hook types. also update Python binding after this change
2016-02-11 08:02:13 +08:00
6478a24404
Merge branch 'gdt_idt' of https://github.com/cseagle/unicorn into cseagle-gdt_idt
2016-02-06 17:31:42 +08:00
49b9f4f8da
uc_x86_mmr type available in qemu/target-i386/unicorn.c
2016-02-04 19:09:41 -08:00
59f7bf3be7
file perms
2016-02-04 16:48:27 -08:00
e59382e030
updated gdtr/idtr/ldtr/tr read/write code
2016-02-04 16:44:52 -08:00
1e13777c91
added memory fuzzer and 2 resulting testcases
2016-02-04 19:57:20 +01:00
9977054a15
add support for setting gdtr, idtr, ldtr, and tr programatically
2016-02-03 09:22:29 -08:00
e42aba760f
fix a typo in test_tb_x86.c
2016-01-31 14:07:35 +08:00
32b9deca04
unit: use UC_HOOK_MEM_VALID for test_tb_x86.c
2016-01-31 13:14:11 +08:00
1fb5416f4a
unit: simplify test_tb_x86.c
2016-01-31 13:06:42 +08:00
a5020c69bb
Merge pull request #408 from egberts/master
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Pull Request for Issue #364 : Invalidating Translation Cache after self-modifying code
2016-01-31 10:37:04 +08:00
fc22a359e2
Issue #364 - Move RIP/PC closer next to the offending self-modifying code
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which modified the 2nd next instruction (imul) in which that escaped
our wonderful ability to invalidate the
instruction translation cache in which we badly need to pick up the
self-modification being made.
2016-01-30 19:30:17 -05:00
5a04bcb115
allow to change PC during callback. this solves issue #210
2016-01-28 14:06:17 +08:00
33180b5afa
add test for multiple basic block hooks
2016-01-22 18:42:14 -08:00
840eb54f05
Revert "arm64: fix the access to tcg_op_defs[] in arm64 backend (issue #387 )"
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This reverts commit 3000ca6abf
2016-01-22 11:33:36 +08:00
3000ca6abf
arm64: fix the access to tcg_op_defs[] in arm64 backend (issue #387 )
2016-01-22 11:33:28 +08:00
6f0a01293d
unit: fix some compilation warnings in test_tb_x86.c
2016-01-17 10:06:00 +08:00
f0dac63b69
In response to issue #364 , a unit test case has been created
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for exercising proper flushing of the instruction translation cache.
2016-01-16 18:05:32 -05:00
91501bc2d1
unit: modify the testcase #349 to reflect the recent change on the semantics of uc_mem_map()
2015-12-30 09:19:34 +08:00
6e534417f1
unit: change clang -> CC
2015-12-30 08:50:58 +08:00
fa2da819b6
added test for unmap of doubly mapped region
2015-12-28 22:02:31 +01:00
ed319bda0b
x86: identity map guest address to host address. this fixes issue #300
2015-12-24 09:51:17 +08:00
771f9f7c3b
fix conflicts when merging map-ptr branch to master branch
2015-12-17 08:12:02 +08:00
0e62ebc038
unit: fix compilation warning for test_mem_high.c
2015-12-12 00:58:49 +08:00
14e75252a5
added testcase for the values read from high addresses
2015-12-10 16:18:22 +01:00
e4fe6b58b4
added test for memory quirks
2015-12-08 18:23:06 +01:00
230cbd5330
add permissions to map_ptr api
2015-11-28 11:28:31 -08:00
6d21ebabea
implement host-controlled memory mapping for #261
2015-11-27 23:30:36 -08:00
9e64cba6ec
Rename some hook related enums:
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- UC_ERR_READ_INVALID -> UC_ERR_READ_UNMAPPED
- UC_ERR_WRITE_INVALID -> UC_ERR_WRITE_UNMAPPED
- UC_ERR_FETCH_INVALID -> UC_ERR_FETCH_UNMAPPED
- UC_MEM_READ_INVALID -> UC_MEM_READ_UNMAPPED
- UC_MEM_WRITE_INVALID -> UC_MEM_WRITE_UNMAPPED
- UC_MEM_FETCH_INVALID -> UC_MEM_FETCH_UNMAPPED
- UC_HOOK_MEM_READ_INVALID -> UC_HOOK_MEM_READ_UNMAPPED
- UC_HOOK_MEM_WRITE_INVALID -> UC_HOOK_MEM_WRITE_UNMAPPED
- UC_HOOK_MEM_FETCH_INVALID -> UC_HOOK_MEM_FETCH_UNMAPPED
- UC_HOOK_MEM_INVALID -> UC_HOOK_MEM_UNMAPPED
This also renames some newly added macros to use _INVALID postfix:
- UC_HOOK_MEM_READ_ERR -> UC_HOOK_MEM_READ_INVALID
- UC_HOOK_MEM_WRITE_ERR -> UC_HOOK_MEM_WRITE_INVALID
- UC_HOOK_MEM_FETCH_ERR -> UC_HOOK_MEM_FETCH_INVALID
- UC_HOOK_MEM_ERR -> UC_HOOK_MEM_INVALID
Fixed all the bindings Java, Go & Python.
2015-09-30 14:46:55 +08:00
90eb8f2e72
This commit continues the PR #111
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- Allow to register handler separately for invalid memory access
- Add new memory events for hooking:
- UC_MEM_READ_INVALID, UC_MEM_WRITE_INVALID, UC_MEM_FETCH_INVALID
- UC_HOOK_MEM_READ_PROT, UC_HOOK_MEM_WRITE_PROT, UC_HOOK_MEM_FETCH_PROT
- Rename UC_ERR_EXEC_PROT to UC_ERR_FETCH_PROT
- Change API uc_hook_add() so event type @type can be combined from hooking types
2015-09-24 14:18:02 +08:00
3c1d65ea66
Reorganize test directories
2015-09-21 20:47:45 -05:00
