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3e6665db00
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Implement coprocessor register read/write for arm64
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2022-02-11 22:13:01 +01:00 |
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b9c0066a47
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Format and naming
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2021-11-04 20:04:57 +01:00 |
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090686f8ed
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uc_ctl proposal (#1473)
* Add uc_ctl
* Add comments
* Slightly changed for bindings generation
* Generate bindings
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2021-10-30 10:45:32 +08:00 |
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e62b0ef255
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Add clang-format and format code to qemu code style
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2021-10-29 12:44:49 +02:00 |
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149121539b
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[arm64] Add some cool registers (#1253)
I've added the following registers to the API:
* PSTATE
* Exception link registers (ELR_ELx)
* Stack pointers registers (SP_ELx)
* MMU (TTBRn_EL1)
* Exception syndrom registers (ESR_ELx)
* Faulting virtual address registers (FAR_ELx)
* PAR (PAR_EL1)
* MAIR (MAIR_EL1)
* Vector base address registers (VBAR_ELx)
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2020-05-10 21:50:00 +08:00 |
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da5f2fc883
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Fix wrong register aliases on arm64 (#922)
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2017-12-20 22:09:38 +08:00 |
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e6c27cfbd5
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LGPL2 for all header files under include/unicorn/
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2017-12-16 10:08:42 +08:00 |
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014ccfb94a
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Aarch64 add thread registers (#834)
* add thread registers to AArch64
* update bindings to add AArch64 thread registers
* fix indentation for register read/write switch-case in unicorn_aarch64.c
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2017-05-14 14:42:49 +07:00 |
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187b470245
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add arm64 CPACR_EL1 register support (#814)
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2017-05-02 14:51:19 +08:00 |
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770c5616e2
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Automated leading tab to spaces conversion.
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2017-01-21 12:28:22 +11:00 |
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a167f7c456
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renames the register constants so unicorn and capstone can compile together
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2015-08-23 21:36:33 -07:00 |
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344d016104
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import
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2015-08-21 15:04:50 +08:00 |
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