b9c0066a47
Format and naming
2021-11-04 20:04:57 +01:00
090686f8ed
uc_ctl proposal ( #1473 )
...
* Add uc_ctl
* Add comments
* Slightly changed for bindings generation
* Generate bindings
2021-10-30 10:45:32 +08:00
e62b0ef255
Add clang-format and format code to qemu code style
2021-10-29 12:44:49 +02:00
46e8ac03ad
Remove useless x86 registers according to #1440
2021-10-04 11:03:56 +02:00
aaaea14214
import Unicorn2
2021-10-03 22:14:44 +08:00
625399774c
X64 base regs ( #1166 )
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* x86: setup FS & GS base
* Fixed base register writes for x64, removed then for x16/x32 (the don't exist there?)
* FS reg comes before GS so the base regs do so, too
* added shebang to const_generator.py
* Added base regs to and added 'all' support to const_generator
Co-authored-by: naq <aquynh@gmail.com >
2020-05-05 08:34:51 +08:00
256e7782ce
Added MXCSR register, fixed writing to FPUCW. ( #1059 )
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* Added MXCSR register for reading and writing
* Changed writing for fpucw register, now the qemu rounding status is updated as well
2019-02-15 12:59:49 +08:00
e6c27cfbd5
LGPL2 for all header files under include/unicorn/
2017-12-16 10:08:42 +08:00
c01dcf0a14
fix merge conflicts
2017-03-10 21:04:33 +08:00
f4325f8c4e
bindings: update to support X86 MSR id
2017-02-24 21:51:01 +08:00
02e6c14e12
x86: add MSR API via reg API ( #755 )
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Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...
So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
Byte Value Size
0 MSR ID 4
4 MSR val 8
2017-02-24 21:37:19 +08:00
a0f7b526bd
cleanup include/unicorn/*.h
2017-01-22 06:02:07 +08:00
770c5616e2
Automated leading tab to spaces conversion.
2017-01-21 12:28:22 +11:00
fac6a66860
platform.h move #3
2017-01-21 00:13:21 +11:00
1aeaf5c40d
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
fd825fb800
Added stdint include to x86.h
...
x86.h referenced types defined in stdint.h (e.g. uint16_t, etc.), but didn't
actually include stdint.h
2016-04-01 23:38:32 +11:00
23b3f651f9
Indentation
2016-03-10 07:45:36 -03:00
0a3799eada
FPU control word and tags
2016-03-09 19:14:33 -03:00
ed77cacbf3
cosmetic change for uc_x86_mmr
2016-02-06 17:34:19 +08:00
49b9f4f8da
uc_x86_mmr type available in qemu/target-i386/unicorn.c
2016-02-04 19:09:41 -08:00
59f7bf3be7
file perms
2016-02-04 16:48:27 -08:00
e59382e030
updated gdtr/idtr/ldtr/tr read/write code
2016-02-04 16:44:52 -08:00
9977054a15
add support for setting gdtr, idtr, ldtr, and tr programatically
2016-02-03 09:22:29 -08:00
4ea3a3ebbf
change uch to uc_struct (header files)
2015-08-26 08:20:44 -04:00
60099d1d69
x86: add back 2 registers X86_REG_FCW & X86_REG_FPIP
2015-08-24 13:58:52 +08:00
a167f7c456
renames the register constants so unicorn and capstone can compile together
2015-08-23 21:36:33 -07:00
e1baf2f36b
x86: support hooking SYSCALL/SYSENTER instructions. we no longer share the SYSCALL callback with interrupt instructions
2015-08-23 01:19:40 +08:00
344d016104
import
2015-08-21 15:04:50 +08:00
