Commit Graph

33 Commits

Author SHA1 Message Date
c10639fd46 Bump version in bindings
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2022-02-13 11:03:57 +01:00
89a1da9a33 Update bindings 2022-02-11 22:42:31 +01:00
mio
f57467e7ed Generate bindings 2022-01-19 20:10:09 +01:00
459a595a98 Merge branch 'dev' into s390x
Mostly for bindings update.
2022-01-15 20:56:39 +01:00
dfb0446137 Update bindings 2022-01-15 20:56:24 +01:00
71f044ca50 Merge branch 'dev' into s390x 2022-01-10 15:17:42 +01:00
c671efe798 Update bindings 2022-01-05 22:00:59 +01:00
c4b4189857 Update bindings 2022-01-04 21:12:52 +01:00
6813e4a042 bindings: update const_generator.py, and update all binding constants 2022-01-01 09:24:28 +08:00
b9c0066a47 Format and naming 2021-11-04 20:04:57 +01:00
db90f39ac6 Generate bindings 2021-11-04 20:01:19 +01:00
aaf340d9e4 Merge branch 'dev' into patch 2021-11-02 18:36:22 +08:00
090686f8ed uc_ctl proposal (#1473)
* Add uc_ctl

* Add comments

* Slightly changed for bindings generation

* Generate bindings
2021-10-30 10:45:32 +08:00
e695686c15 Remove AFL Integration by reverting 2021-10-26 11:22:21 +02:00
f08b7d6b5b Make gen_const work and updates constants 2021-10-25 00:57:32 +02:00
00b4a17c1b Fix some typos in include files (#1350) 2021-10-11 11:18:27 +08:00
e8bd7ca087 bindings: update X86 register constants 2021-10-04 19:41:41 +08:00
0a7223996d bindings: update constants from ARM registers 2021-10-04 01:04:43 +08:00
aaaea14214 import Unicorn2 2021-10-03 22:14:44 +08:00
2874435d2f bump version to 1.0.3 2021-05-16 21:38:08 +08:00
21ec6e8f83 Add ARM BE8 support (#1369)
Co-authored-by: w4kfu <gw4kfu@gmail.com>
2021-03-31 21:22:35 +08:00
770d5679c3 Fix some typos in include files (#1350) 2020-10-29 11:16:45 +08:00
fbef45b18f remove UC_ERR_TIMEOUT, so timeout on uc_emu_start() is not considered error. added UC_QUERY_TIMEOUT to query exit reason 2020-05-24 23:54:45 +08:00
cf3451c37a bindings: update ARM64 registers 2020-05-10 21:51:14 +08:00
625399774c X64 base regs (#1166)
* x86: setup FS & GS base

* Fixed base register writes for x64, removed then for x16/x32 (the don't exist there?)

* FS reg comes before GS so the base regs do so, too

* added shebang to const_generator.py

* Added base regs to and added 'all' support to const_generator

Co-authored-by: naq <aquynh@gmail.com>
2020-05-05 08:34:51 +08:00
b0d5837c61 bindings: add UC_ERR_TIMEOUT 2019-12-29 00:19:34 +08:00
naq
3b17db0d84 bindings: update after the last commit on adding ARM modes 2019-10-26 05:02:39 +08:00
naq
355eaecc12 bindings: update after addition of UC_HOOK_INSN_INVALID 2019-09-23 01:54:24 +08:00
24f55a7973 Removed hardcoded CP0C3_ULRI (#1098)
* activate CP0C3_ULRI for CONFIG3, mips

* updated with mips patches

* updated with mips patches

* remove hardcoded config3

* git ignore vscode

* fix spacing issue and turn on floating point
2019-07-06 17:53:02 +08:00
07cafff76a bindings: update for latest ARM registers addition 2019-03-07 08:38:41 +08:00
6d47b38b7f bindings: update after recent addition of ARM_REG_IPSR 2019-02-28 09:56:29 +08:00
738d102989 bindings: add newly added register MXCSR 2019-02-15 13:01:27 +08:00
84220d8360 Pascal/Delphi binding (#987)
* Pascal/Delphi binding

Pascal/Delphi language binding

* update credits
2018-08-03 20:33:25 +08:00