4c312d9095
Update TODO
2021-12-30 01:12:38 +01:00
085ee07c73
No more hard-coded cpu models
2021-12-30 01:05:10 +01:00
fdbd743c21
Remove hard-coded cpu model
2021-12-30 00:54:55 +01:00
a72cbda6de
Initialize empty structs explictly to build on MSVC
2021-12-30 00:51:07 +01:00
03f9dd8b61
Expand case ranges to build on MSVC
2021-12-30 00:42:13 +01:00
dc402d78ec
Ignore QEMU_BUILD_BUG_MSG on MSVC
2021-12-30 00:28:24 +01:00
ab4ef2e1de
Fix MSVC build and remove warning about unused functions
2021-12-30 00:26:25 +01:00
298795a9f8
Fix build on MSVC
2021-12-29 23:18:49 +01:00
8fc836c5fa
Fix tests list not marked with NULL
2021-12-29 23:10:21 +01:00
849325b9c6
Add unit test for s390x
2021-12-27 23:59:53 +01:00
a1e6d64118
Update TODO
2021-12-27 23:55:24 +01:00
3e674718b4
Update TODO
2021-12-27 23:51:05 +01:00
034a1aa5f2
Make s390x stopping mechanism work
2021-12-27 23:48:20 +01:00
a38151bf77
Make s390x skey work
2021-12-27 23:19:17 +01:00
e977f81813
Make s390x build
2021-12-26 23:09:25 +01:00
faa689c0f0
Merge systemz to the latest uc2 codebase
2021-12-26 22:58:32 +01:00
64da57ff29
Merge static-vars
2021-12-26 22:49:02 +01:00
cddc9cf2ed
Fix arm post init
2021-12-25 00:16:51 +01:00
5b3a9e1024
Add test for arm v8
2021-12-24 23:45:57 +01:00
4f73d75ea8
Fix #1500
2021-12-23 21:46:27 +01:00
ef6f8a2427
Fix x86 CPUID
2021-12-22 23:39:41 +01:00
3184d3fcdf
Update python bindings
2021-12-22 20:46:14 +01:00
a81e155633
Pack test variables
2021-12-22 20:45:15 +01:00
7bb0abb977
Format
2021-12-22 20:37:15 +01:00
7bb756249a
Better design of cpuid instruction hook
2021-12-22 20:36:56 +01:00
dfb14e971f
Merge pull request #1512 from QDucasse/code_patching
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Issues with count for code patching
2021-12-22 20:08:27 +01:00
033e79abac
Added cache flush after code patching in unit tests for arm64 and riscv
2021-12-17 14:55:08 +01:00
63a445cbba
fxsave / fxsave64 should store the floating point instruction pointer (fpip) ( #1467 )
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* fxsave / fxsave64 should store the floating point instruction pointer (fpip)
- fxsave / fxsave64 happen to be used as GetPC code in exploits
* unit tests for the storage of FPIP in fxsave (x86) and fxsave64 (x64)
2021-12-13 08:40:32 +08:00
549274f44c
Code patching tests for riscv and arm64
2021-12-10 15:27:54 +01:00
3e9ae003b7
Add use_system_unicorn feature in rust bindings
2021-12-10 19:44:39 +08:00
607aff44a2
Update TODO-s390
2021-12-08 10:00:57 +08:00
017c82e561
Merge pull request #1509 from ispras/bugfix-lui
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Bug fix for LUI instruction (MIPS)
2021-12-07 01:12:08 +01:00
09b0c66f11
move all static vars in translate.c to tcg.h
2021-12-07 04:53:32 +08:00
7918a6e462
TODO
2021-12-07 04:32:05 +08:00
4059906e78
Bug fix for LUI instruction (MIPS)
2021-12-06 19:15:00 +03:00
eca359989c
update TODO
2021-12-06 04:55:35 +08:00
b042a6a01d
add missing files
2021-12-06 04:28:13 +08:00
97b92d8861
initial systemz support
2021-12-06 04:19:37 +08:00
1923c12315
Merge pull request #1506 from zznop/1502-set-cpu-go
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SetCPUModel go binding for setting the CPU model
2021-12-04 23:26:41 +01:00
5eb5686538
Format
2021-12-04 23:22:42 +01:00
8a0ca8715e
Fix SR read/write and a test
2021-12-04 23:22:28 +01:00
3020d7b82a
Fix wrong m68k enums
2021-12-04 23:20:46 +01:00
2cc15c7260
Added SetCPUModel go binding
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Go cannot use C macros directly, so I followed existing convention and
added a helper to uc.c to call the uc_ctl_set_cpu_model macro
2021-12-04 16:25:23 -05:00
d204dc6374
Added SR to M68K reg_read and reg_write ( #1507 )
2021-12-02 14:12:49 +08:00
c190069b10
Merge pull request #1504 from Kritzefitz/rust-riscv-registers
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rust: Add RISCV CSR registers
2021-12-01 13:28:13 +01:00
59fb8a2733
rust: Add RISCV CSR registers
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The addition of these registers in the C base caused the rust values
for all floating point registers and the PC to point to some of the
CSR registers instead.
2021-11-30 16:09:24 +01:00
10d88e89a5
Fix uc_version and bump again
2021-11-25 18:19:46 +01:00
3288a58fa6
Fix Rust CI by requesting a fresh copy when doing publish
2021-11-25 17:49:12 +01:00
f4ffccfd5e
Always upload artifacts for windows and macos
2021-11-25 15:31:53 +01:00
9af54b02e3
Always upload artifacts
2021-11-25 14:43:53 +01:00
