Commit Graph

58 Commits

Author SHA1 Message Date
cf3451c37a bindings: update ARM64 registers 2020-05-10 21:51:14 +08:00
625399774c X64 base regs (#1166)
* x86: setup FS & GS base

* Fixed base register writes for x64, removed then for x16/x32 (the don't exist there?)

* FS reg comes before GS so the base regs do so, too

* added shebang to const_generator.py

* Added base regs to and added 'all' support to const_generator

Co-authored-by: naq <aquynh@gmail.com>
2020-05-05 08:34:51 +08:00
b0d5837c61 bindings: add UC_ERR_TIMEOUT 2019-12-29 00:19:34 +08:00
naq
3b17db0d84 bindings: update after the last commit on adding ARM modes 2019-10-26 05:02:39 +08:00
naq
355eaecc12 bindings: update after addition of UC_HOOK_INSN_INVALID 2019-09-23 01:54:24 +08:00
24f55a7973 Removed hardcoded CP0C3_ULRI (#1098)
* activate CP0C3_ULRI for CONFIG3, mips

* updated with mips patches

* updated with mips patches

* remove hardcoded config3

* git ignore vscode

* fix spacing issue and turn on floating point
2019-07-06 17:53:02 +08:00
07cafff76a bindings: update for latest ARM registers addition 2019-03-07 08:38:41 +08:00
6d47b38b7f bindings: update after recent addition of ARM_REG_IPSR 2019-02-28 09:56:29 +08:00
738d102989 bindings: add newly added register MXCSR 2019-02-15 13:01:27 +08:00
41cc047b87 bindings: update after #922 2017-12-20 22:13:29 +08:00
3fdb2d2442 add architecture query (#842) 2017-05-21 09:47:02 +08:00
014ccfb94a Aarch64 add thread registers (#834)
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
09d14704a5 bindings: update after UC_VERSION_EXTRA change 2017-04-25 12:41:00 +08:00
5dbc640b9a bump UC_VERSION_EXTRA to 1 2017-04-20 14:14:24 +08:00
f4325f8c4e bindings: update to support X86 MSR id 2017-02-24 21:51:01 +08:00
b616115df1 update ChangeLog 2017-01-25 12:00:18 +08:00
8adc8afc63 Java bindings (#711)
* Remove glib from samples makefile

* support new APIs

* reimplement register batch mode interface

* stop using deprecated java API
2017-01-11 09:27:16 +08:00
21ffaf7d10 Java bindings (#709)
* Remove glib from samples makefile

* support new APIs

* reimplement register batch mode interface

* stop using deprecated java API
2017-01-06 23:56:53 +08:00
7a1930a879 add UC_VERSION_{MAJOR, MINOR, EXTRA} 2016-10-25 14:37:47 +08:00
4083b87032 add new hook type UC_HOOK_MEM_READ_AFTER, adapted from PR #399 by @farmdve. updated all bindings, except Ruby & Haskell 2016-10-22 11:19:55 +08:00
9a2a5b15d8 Rename unhandled CPU exception 2016-07-05 11:10:39 -05:00
9cdca5a32b Unhandled interrupt will halt execution 2016-07-04 17:07:57 -05:00
28b94d10b8 bindings: add X86 FPTAGS & FPCW registers after recent change in the core 2016-03-14 09:14:48 +08:00
2031f7cbdd [query] update bindings UC_QUERY_PAGE_SIZE
Signed-off-by: Nicolas PLANEL <nplanel@redhat.com>
2016-03-04 15:54:24 +11:00
0822c0af85 bump API version to 1.0 2016-02-11 08:05:15 +08:00
84fbe5aa5d add x86 mmr handling to java binding 2016-02-07 07:23:07 -08:00
a5b1ae47c3 remove unnecessary file 2016-02-06 19:19:55 -08:00
ec5998bd02 fix file perms 2016-02-06 15:18:44 -08:00
21b9fa860b fix file perms 2016-02-06 15:18:03 -08:00
aa1657006b implement missing APIs (uc_query, uc_mem_map_ptr, uc_mem_regions) in java binding 2016-02-06 15:16:44 -08:00
6986fa3947 x86: add new register enums for IDT, LDT, GDT & TR 2016-02-06 17:35:45 +08:00
a2ef52172c add combination hook type UC_HOOK_MEM_VALID to intercept all valid memory access 2016-01-31 13:12:34 +08:00
9ec2163571 bindings: add UC_MODE_PPC32 constant after recent update on unicorn.h 2016-01-24 20:50:26 +08:00
6f3d48077e rename UC_QUERY_ARM_MODE to a more generic name UC_QUERY_MODE. make all bindings support this new constant 2016-01-24 01:08:23 +08:00
d79925f477 sparc: add SPARC32 mode (= UC_MODE_32) 2016-01-23 10:48:18 +08:00
ca79d11211 bindings: update constants after recent changes in unicorn.h 2016-01-23 10:31:16 +08:00
2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
b1d41d414b on some hook events, uc_hook_add() should not allow more than 1 handler. this add UC_ERR_HOOK_EXIST error type 2015-10-10 18:01:47 +08:00
7e7c6512f5 add composite const generator (fix #161) 2015-10-03 10:41:19 -07:00
9e64cba6ec Rename some hook related enums:
- UC_ERR_READ_INVALID -> UC_ERR_READ_UNMAPPED
 - UC_ERR_WRITE_INVALID -> UC_ERR_WRITE_UNMAPPED
 - UC_ERR_FETCH_INVALID -> UC_ERR_FETCH_UNMAPPED
 - UC_MEM_READ_INVALID -> UC_MEM_READ_UNMAPPED
 - UC_MEM_WRITE_INVALID -> UC_MEM_WRITE_UNMAPPED
 - UC_MEM_FETCH_INVALID -> UC_MEM_FETCH_UNMAPPED
 - UC_HOOK_MEM_READ_INVALID -> UC_HOOK_MEM_READ_UNMAPPED
 - UC_HOOK_MEM_WRITE_INVALID -> UC_HOOK_MEM_WRITE_UNMAPPED
 - UC_HOOK_MEM_FETCH_INVALID -> UC_HOOK_MEM_FETCH_UNMAPPED
 - UC_HOOK_MEM_INVALID -> UC_HOOK_MEM_UNMAPPED

This also renames some newly added macros to use _INVALID postfix:

 - UC_HOOK_MEM_READ_ERR -> UC_HOOK_MEM_READ_INVALID
 - UC_HOOK_MEM_WRITE_ERR -> UC_HOOK_MEM_WRITE_INVALID
 - UC_HOOK_MEM_FETCH_ERR -> UC_HOOK_MEM_FETCH_INVALID
 - UC_HOOK_MEM_ERR -> UC_HOOK_MEM_INVALID

Fixed all the bindings Java, Go & Python.
2015-09-30 14:46:55 +08:00
4ebc876bd1 file permissions 2015-09-24 09:47:06 -07:00
4297ba4310 additional update to handle new hooking macros 2015-09-24 09:41:49 -07:00
14a71b5546 update java bindings for new memory event hooking constants 2015-09-24 04:33:02 -07:00
fe807952d0 bindings: update Sparc registers after the last core change 2015-09-15 14:17:57 +07:00
39ac1bcb4e rename UC_ERR_INVAL to UC_ERR_ARG 2015-09-09 16:54:47 +08:00
d7ef204398 rename error codes ERR_MEM_READ, ERR_MEM_WRITE, ERR_MEM_FETCH 2015-09-09 16:25:48 +08:00
fda17cd377 java: rename UC_MEM_EXE to UC_MEM_FETCH 2015-09-08 12:57:40 +08:00
1843a96321 update jave binding to follow apit change of uc_mem_read and uc_mem_write 2015-09-07 14:12:43 -07:00
d1bdbd11e7 rename uchook to uc_hook, ucengine to uc_engine, uc_hook_t to uc_hook_type 2015-09-05 11:20:32 +08:00