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e55b76f057
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s390x: cleanup & re-enable some skey code
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2021-12-31 10:05:05 +08:00 |
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1a0f0d0768
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s390x: remove some unused fields in S390CPU
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2021-12-31 09:48:16 +08:00 |
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a06563ecdd
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Fix memory leak
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2021-12-31 00:24:18 +01:00 |
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3b667338cf
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Fix s390x warnings
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2021-12-31 00:10:50 +01:00 |
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fa3fb82c9c
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s390x: fix warning on commented code
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2021-12-30 17:17:49 +08:00 |
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fdbd743c21
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Remove hard-coded cpu model
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2021-12-30 00:54:55 +01:00 |
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a72cbda6de
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Initialize empty structs explictly to build on MSVC
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2021-12-30 00:51:07 +01:00 |
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03f9dd8b61
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Expand case ranges to build on MSVC
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2021-12-30 00:42:13 +01:00 |
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dc402d78ec
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Ignore QEMU_BUILD_BUG_MSG on MSVC
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2021-12-30 00:28:24 +01:00 |
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ab4ef2e1de
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Fix MSVC build and remove warning about unused functions
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2021-12-30 00:26:25 +01:00 |
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298795a9f8
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Fix build on MSVC
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2021-12-29 23:18:49 +01:00 |
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034a1aa5f2
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Make s390x stopping mechanism work
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2021-12-27 23:48:20 +01:00 |
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a38151bf77
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Make s390x skey work
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2021-12-27 23:19:17 +01:00 |
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e977f81813
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Make s390x build
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2021-12-26 23:09:25 +01:00 |
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faa689c0f0
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Merge systemz to the latest uc2 codebase
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2021-12-26 22:58:32 +01:00 |
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cddc9cf2ed
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Fix arm post init
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2021-12-25 00:16:51 +01:00 |
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4f73d75ea8
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Fix #1500
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2021-12-23 21:46:27 +01:00 |
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ef6f8a2427
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Fix x86 CPUID
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2021-12-22 23:39:41 +01:00 |
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7bb756249a
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Better design of cpuid instruction hook
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2021-12-22 20:36:56 +01:00 |
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09b0c66f11
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move all static vars in translate.c to tcg.h
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2021-12-07 04:53:32 +08:00 |
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b042a6a01d
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add missing files
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2021-12-06 04:28:13 +08:00 |
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97b92d8861
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initial systemz support
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2021-12-06 04:19:37 +08:00 |
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8a0ca8715e
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Fix SR read/write and a test
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2021-12-04 23:22:28 +01:00 |
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d204dc6374
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Added SR to M68K reg_read and reg_write (#1507)
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2021-12-02 14:12:49 +08:00 |
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221cde18df
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Write CPSR as it is initiated from instructions to allow regs switch
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2021-11-24 17:10:51 +01:00 |
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78e0ddbc4d
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Fix mmio unmap
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2021-11-24 00:18:19 +01:00 |
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c733bbada3
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Fix wrong offset used in split_region
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2021-11-23 23:22:53 +01:00 |
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c1c5f72918
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Fix the sizemask for inline hooking
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2021-11-23 21:18:21 +01:00 |
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7a1de17f37
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Fix UC_HOOK_EDGE_GENERATED to work with indirect jump
For an indirect jump (lookup_tb_ptr), last_tb would be NULL
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2021-11-23 00:25:55 +01:00 |
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083ccf160b
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Use fprintf
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2021-11-22 21:22:21 +01:00 |
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87a391d549
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Inline uc_tracecode when there is only exactly one hook
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2021-11-21 16:44:39 +01:00 |
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c1106b811b
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Fix a memory leak in mmio
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2021-11-16 22:44:03 +01:00 |
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fc467edbc6
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Fix 32bit target getting wrong offset for mmio
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2021-11-16 22:40:57 +01:00 |
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247ffbe0e8
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Support nested uc_emu_start calls
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2021-11-16 21:07:03 +01:00 |
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43c643d4af
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Fix #1488
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2021-11-16 09:41:21 +01:00 |
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7e244f87b4
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Fix UC_HOOK_EDGE_GENERATED implementation
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2021-11-11 22:15:15 +01:00 |
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23ef5da491
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Merge pull request #1481 from bet4it/cp15
Restore cp15 registers
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2021-11-09 16:50:31 +01:00 |
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acaed986b5
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Restore cp15 registers
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2021-11-09 13:13:08 +08:00 |
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640251e1aa
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Leave out size parameter in callback
|
2021-11-09 00:21:34 +01:00 |
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2f61592ff9
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Fix uc_mem_protect
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2021-11-07 20:37:58 +01:00 |
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c6fdbb3735
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Add RISCV CSR registers
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2021-11-07 20:36:04 +01:00 |
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7268c2a19b
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mips: support reading and writing of hi/lo regs
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2021-11-07 20:27:02 +01:00 |
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94a82ed94d
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Ensure JIT protection is disabled when generating TB
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2021-11-07 20:23:25 +01:00 |
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613ddf0985
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Format
|
2021-11-04 19:58:44 +01:00 |
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871de4ad65
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Split mips cpu to 32 and 64
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2021-11-04 19:58:32 +01:00 |
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0555095388
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Support changing cpu model for ppc
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2021-11-04 19:53:02 +01:00 |
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e5a2eae173
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Add comment for default cpu model
|
2021-11-04 19:22:50 +01:00 |
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64452e249d
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Support changing cpu model for sparc
|
2021-11-04 19:22:08 +01:00 |
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b0280f5e55
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Support changing cpu model for m68k
|
2021-11-04 19:16:35 +01:00 |
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172a2fbe6d
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Support changing cpu model for riscv
|
2021-11-04 19:13:53 +01:00 |
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