301 lines
7.5 KiB
C
301 lines
7.5 KiB
C
/*
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* QEMU S/390 CPU
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2011 Alexander Graf
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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* Copyright (c) 2012 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "internal.h"
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#include "qemu/timer.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/tcg.h"
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#include "fpu/softfloat-helpers.h"
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#include "exec/exec-all.h"
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#define CR0_RESET 0xE0UL
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#define CR14_RESET 0xC2000000UL;
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static void s390_cpu_set_pc(CPUState *cs, vaddr value)
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{
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S390CPU *cpu = S390_CPU(cs);
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cpu->env.psw.addr = value;
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}
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static bool s390_cpu_has_work(CPUState *cs)
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{
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S390CPU *cpu = S390_CPU(cs);
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#if 0
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/* STOPPED cpus can never wake up */
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if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD &&
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s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) {
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return false;
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}
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#endif
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if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
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return false;
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}
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return s390_cpu_has_int(cpu);
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}
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/* S390CPUClass::reset() */
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static void s390_cpu_reset(CPUState *dev, cpu_reset_type type)
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{
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CPUState *s = CPU(dev);
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S390CPU *cpu = S390_CPU(s);
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUS390XState *env = &cpu->env;
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scc->parent_reset(dev);
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cpu->env.sigp_order = 0;
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s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
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switch (type) {
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case S390_CPU_RESET_CLEAR:
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memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields));
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/* fall through */
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case S390_CPU_RESET_INITIAL:
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/* initial reset does not clear everything! */
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memset(&env->start_initial_reset_fields, 0,
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offsetof(CPUS390XState, start_normal_reset_fields) -
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offsetof(CPUS390XState, start_initial_reset_fields));
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/* architectured initial value for Breaking-Event-Address register */
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env->gbea = 1;
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/* architectured initial values for CR 0 and 14 */
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env->cregs[0] = CR0_RESET;
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env->cregs[14] = CR14_RESET;
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/* tininess for underflow is detected before rounding */
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set_float_detect_tininess(float_tininess_before_rounding,
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&env->fpu_status);
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/* fall through */
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case S390_CPU_RESET_NORMAL:
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env->psw.mask &= ~PSW_MASK_RI;
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memset(&env->start_normal_reset_fields, 0,
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offsetof(CPUS390XState, end_reset_fields) -
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offsetof(CPUS390XState, start_normal_reset_fields));
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env->pfault_token = -1UL;
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env->bpbc = false;
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break;
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default:
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g_assert_not_reached();
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}
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}
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static void s390_cpu_realizefn(struct uc_struct *uc, CPUState *dev)
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{
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CPUState *cs = CPU(dev);
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S390CPU *cpu = S390_CPU(dev);
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/* the model has to be realized before qemu_init_vcpu() due to kvm */
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// s390_realize_cpu_model(cs);
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/* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */
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cs->cpu_index = cpu->env.core_id;
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cpu_exec_realizefn(cs);
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qemu_init_vcpu(cs);
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cpu_reset(cs);
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}
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static void s390_cpu_initfn(struct uc_struct *uc, CPUState *obj)
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{
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CPUState *cs = CPU(obj);
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S390CPU *cpu = S390_CPU(obj);
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cpu_set_cpustate_pointers(cpu);
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cs->halted = 1;
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cs->exception_index = EXCP_HLT;
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// s390_cpu_model_register_props(obj);
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// cpu->env.tod_timer =
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// timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
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// cpu->env.cpu_timer =
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// timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
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s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
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cpu->env.uc = uc;
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}
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static unsigned s390_count_running_cpus(void)
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{
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return 1;
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}
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unsigned int s390_cpu_halt(S390CPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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if (!cs->halted) {
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cs->halted = 1;
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cs->exception_index = EXCP_HLT;
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}
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return s390_count_running_cpus();
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}
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void s390_cpu_unhalt(S390CPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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if (cs->halted) {
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cs->halted = 0;
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cs->exception_index = -1;
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}
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}
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unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
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{
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switch (cpu_state) {
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case S390_CPU_STATE_STOPPED:
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case S390_CPU_STATE_CHECK_STOP:
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/* halt the cpu for common infrastructure */
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s390_cpu_halt(cpu);
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break;
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case S390_CPU_STATE_OPERATING:
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case S390_CPU_STATE_LOAD:
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/*
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* Starting a CPU with a PSW WAIT bit set:
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* KVM: handles this internally and triggers another WAIT exit.
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* TCG: will actually try to continue to run. Don't unhalt, will
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* be done when the CPU actually has work (an interrupt).
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*/
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if (!(cpu->env.psw.mask & PSW_MASK_WAIT)) {
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s390_cpu_unhalt(cpu);
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}
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break;
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default:
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//error_report("Requested CPU state is not a valid S390 CPU state: %u",
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// cpu_state);
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exit(1);
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}
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cpu->env.cpu_state = cpu_state;
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return s390_count_running_cpus();
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}
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int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit)
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{
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return 0;
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}
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void s390_set_max_pagesize(uint64_t pagesize)
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{
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}
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void s390_cmma_reset(void)
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{
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}
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void s390_crypto_reset(void)
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{
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}
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void s390_enable_css_support(S390CPU *cpu)
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{
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}
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#if 0
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static void s390_cpu_reset_full(CPUState *dev)
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{
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return s390_cpu_reset(dev, S390_CPU_RESET_CLEAR);
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}
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#endif
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static void s390_cpu_class_init(struct uc_struct *uc, CPUClass *oc)
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{
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S390CPUClass *scc = S390_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(scc);
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scc->reset = s390_cpu_reset;
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cc->has_work = s390_cpu_has_work;
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// cc->do_interrupt = s390_cpu_do_interrupt;
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cc->set_pc = s390_cpu_set_pc;
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cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
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cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
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cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
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cc->do_unaligned_access = s390x_cpu_do_unaligned_access;
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cc->tcg_initialize = s390x_translate_init;
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cc->tlb_fill = s390_cpu_tlb_fill;
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// s390_cpu_model_class_register_props(oc);
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}
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S390CPU *cpu_s390_init(struct uc_struct *uc, const char *cpu_model)
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{
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S390CPU *cpu;
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CPUState *cs;
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CPUClass *cc;
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// int i;
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cpu = calloc(1, sizeof(*cpu));
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if (cpu == NULL) {
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return NULL;
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}
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if (uc->cpu_model == INT_MAX) {
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uc->cpu_model = 36; // qemu-s390x-cpu
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} else if (uc->cpu_model >= 38) {
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free(cpu);
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return NULL;
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}
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cs = (CPUState *)cpu;
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cc = (CPUClass *)&cpu->cc;
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cs->cc = cc;
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cs->uc = uc;
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uc->cpu = (CPUState *)cpu;
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/* init CPUClass */
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cpu_class_init(uc, cc);
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/* init CPUClass */
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s390_cpu_class_init(uc, cc);
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// init skeys
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s390_skeys_init(uc);
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// init s390 models
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s390_init_cpu_model(uc, uc->cpu_model);
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/* init CPUState */
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cpu_common_initfn(uc, cs);
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/* init CPU */
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s390_cpu_initfn(uc, cs);
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/* realize CPU */
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s390_cpu_realizefn(uc, cs);
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// init addresss space
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cpu_address_space_init(cs, 0, cs->memory);
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qemu_init_vcpu(cs);
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return cpu;
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}
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