360 lines
11 KiB
Forth
360 lines
11 KiB
Forth
// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT
|
|
|
|
namespace UnicornManaged.Const
|
|
|
|
open System
|
|
|
|
[<AutoOpen>]
|
|
module Ppc =
|
|
|
|
let UC_CPU_PPC_401 = 0
|
|
let UC_CPU_PPC_401A1 = 1
|
|
let UC_CPU_PPC_401B2 = 2
|
|
let UC_CPU_PPC_401C2 = 3
|
|
let UC_CPU_PPC_401D2 = 4
|
|
let UC_CPU_PPC_401E2 = 5
|
|
let UC_CPU_PPC_401F2 = 6
|
|
let UC_CPU_PPC_401G2 = 7
|
|
let UC_CPU_PPC_IOP480 = 8
|
|
let UC_CPU_PPC_COBRA = 9
|
|
let UC_CPU_PPC_403GA = 10
|
|
let UC_CPU_PPC_403GB = 11
|
|
let UC_CPU_PPC_403GC = 12
|
|
let UC_CPU_PPC_403GCX = 13
|
|
let UC_CPU_PPC_405D2 = 14
|
|
let UC_CPU_PPC_405D4 = 15
|
|
let UC_CPU_PPC_405CRA = 16
|
|
let UC_CPU_PPC_405CRB = 17
|
|
let UC_CPU_PPC_405CRC = 18
|
|
let UC_CPU_PPC_405EP = 19
|
|
let UC_CPU_PPC_405EZ = 20
|
|
let UC_CPU_PPC_405GPA = 21
|
|
let UC_CPU_PPC_405GPB = 22
|
|
let UC_CPU_PPC_405GPC = 23
|
|
let UC_CPU_PPC_405GPD = 24
|
|
let UC_CPU_PPC_405GPR = 25
|
|
let UC_CPU_PPC_405LP = 26
|
|
let UC_CPU_PPC_NPE405H = 27
|
|
let UC_CPU_PPC_NPE405H2 = 28
|
|
let UC_CPU_PPC_NPE405L = 29
|
|
let UC_CPU_PPC_NPE4GS3 = 30
|
|
let UC_CPU_PPC_STB03 = 31
|
|
let UC_CPU_PPC_STB04 = 32
|
|
let UC_CPU_PPC_STB25 = 33
|
|
let UC_CPU_PPC_X2VP4 = 34
|
|
let UC_CPU_PPC_X2VP20 = 35
|
|
let UC_CPU_PPC_440_XILINX = 36
|
|
let UC_CPU_PPC_440_XILINX_W_DFPU = 37
|
|
let UC_CPU_PPC_440EPA = 38
|
|
let UC_CPU_PPC_440EPB = 39
|
|
let UC_CPU_PPC_440EPX = 40
|
|
let UC_CPU_PPC_460EXB = 41
|
|
let UC_CPU_PPC_G2 = 42
|
|
let UC_CPU_PPC_G2H4 = 43
|
|
let UC_CPU_PPC_G2GP = 44
|
|
let UC_CPU_PPC_G2LS = 45
|
|
let UC_CPU_PPC_G2HIP3 = 46
|
|
let UC_CPU_PPC_G2HIP4 = 47
|
|
let UC_CPU_PPC_MPC603 = 48
|
|
let UC_CPU_PPC_G2LE = 49
|
|
let UC_CPU_PPC_G2LEGP = 50
|
|
let UC_CPU_PPC_G2LELS = 51
|
|
let UC_CPU_PPC_G2LEGP1 = 52
|
|
let UC_CPU_PPC_G2LEGP3 = 53
|
|
let UC_CPU_PPC_MPC5200_V10 = 54
|
|
let UC_CPU_PPC_MPC5200_V11 = 55
|
|
let UC_CPU_PPC_MPC5200_V12 = 56
|
|
let UC_CPU_PPC_MPC5200B_V20 = 57
|
|
let UC_CPU_PPC_MPC5200B_V21 = 58
|
|
let UC_CPU_PPC_E200Z5 = 59
|
|
let UC_CPU_PPC_E200Z6 = 60
|
|
let UC_CPU_PPC_E300C1 = 61
|
|
let UC_CPU_PPC_E300C2 = 62
|
|
let UC_CPU_PPC_E300C3 = 63
|
|
let UC_CPU_PPC_E300C4 = 64
|
|
let UC_CPU_PPC_MPC8343 = 65
|
|
let UC_CPU_PPC_MPC8343A = 66
|
|
let UC_CPU_PPC_MPC8343E = 67
|
|
let UC_CPU_PPC_MPC8343EA = 68
|
|
let UC_CPU_PPC_MPC8347T = 69
|
|
let UC_CPU_PPC_MPC8347P = 70
|
|
let UC_CPU_PPC_MPC8347AT = 71
|
|
let UC_CPU_PPC_MPC8347AP = 72
|
|
let UC_CPU_PPC_MPC8347ET = 73
|
|
let UC_CPU_PPC_MPC8347EP = 74
|
|
let UC_CPU_PPC_MPC8347EAT = 75
|
|
let UC_CPU_PPC_MPC8347EAP = 76
|
|
let UC_CPU_PPC_MPC8349 = 77
|
|
let UC_CPU_PPC_MPC8349A = 78
|
|
let UC_CPU_PPC_MPC8349E = 79
|
|
let UC_CPU_PPC_MPC8349EA = 80
|
|
let UC_CPU_PPC_MPC8377 = 81
|
|
let UC_CPU_PPC_MPC8377E = 82
|
|
let UC_CPU_PPC_MPC8378 = 83
|
|
let UC_CPU_PPC_MPC8378E = 84
|
|
let UC_CPU_PPC_MPC8379 = 85
|
|
let UC_CPU_PPC_MPC8379E = 86
|
|
let UC_CPU_PPC_E500_V10 = 87
|
|
let UC_CPU_PPC_E500_V20 = 88
|
|
let UC_CPU_PPC_E500V2_V10 = 89
|
|
let UC_CPU_PPC_E500V2_V20 = 90
|
|
let UC_CPU_PPC_E500V2_V21 = 91
|
|
let UC_CPU_PPC_E500V2_V22 = 92
|
|
let UC_CPU_PPC_E500V2_V30 = 93
|
|
let UC_CPU_PPC_E500MC = 94
|
|
let UC_CPU_PPC_MPC8533_V10 = 95
|
|
let UC_CPU_PPC_MPC8533_V11 = 96
|
|
let UC_CPU_PPC_MPC8533E_V10 = 97
|
|
let UC_CPU_PPC_MPC8533E_V11 = 98
|
|
let UC_CPU_PPC_MPC8540_V10 = 99
|
|
let UC_CPU_PPC_MPC8540_V20 = 100
|
|
let UC_CPU_PPC_MPC8540_V21 = 101
|
|
let UC_CPU_PPC_MPC8541_V10 = 102
|
|
let UC_CPU_PPC_MPC8541_V11 = 103
|
|
let UC_CPU_PPC_MPC8541E_V10 = 104
|
|
let UC_CPU_PPC_MPC8541E_V11 = 105
|
|
let UC_CPU_PPC_MPC8543_V10 = 106
|
|
let UC_CPU_PPC_MPC8543_V11 = 107
|
|
let UC_CPU_PPC_MPC8543_V20 = 108
|
|
let UC_CPU_PPC_MPC8543_V21 = 109
|
|
let UC_CPU_PPC_MPC8543E_V10 = 110
|
|
let UC_CPU_PPC_MPC8543E_V11 = 111
|
|
let UC_CPU_PPC_MPC8543E_V20 = 112
|
|
let UC_CPU_PPC_MPC8543E_V21 = 113
|
|
let UC_CPU_PPC_MPC8544_V10 = 114
|
|
let UC_CPU_PPC_MPC8544_V11 = 115
|
|
let UC_CPU_PPC_MPC8544E_V10 = 116
|
|
let UC_CPU_PPC_MPC8544E_V11 = 117
|
|
let UC_CPU_PPC_MPC8545_V20 = 118
|
|
let UC_CPU_PPC_MPC8545_V21 = 119
|
|
let UC_CPU_PPC_MPC8545E_V20 = 120
|
|
let UC_CPU_PPC_MPC8545E_V21 = 121
|
|
let UC_CPU_PPC_MPC8547E_V20 = 122
|
|
let UC_CPU_PPC_MPC8547E_V21 = 123
|
|
let UC_CPU_PPC_MPC8548_V10 = 124
|
|
let UC_CPU_PPC_MPC8548_V11 = 125
|
|
let UC_CPU_PPC_MPC8548_V20 = 126
|
|
let UC_CPU_PPC_MPC8548_V21 = 127
|
|
let UC_CPU_PPC_MPC8548E_V10 = 128
|
|
let UC_CPU_PPC_MPC8548E_V11 = 129
|
|
let UC_CPU_PPC_MPC8548E_V20 = 130
|
|
let UC_CPU_PPC_MPC8548E_V21 = 131
|
|
let UC_CPU_PPC_MPC8555_V10 = 132
|
|
let UC_CPU_PPC_MPC8555_V11 = 133
|
|
let UC_CPU_PPC_MPC8555E_V10 = 134
|
|
let UC_CPU_PPC_MPC8555E_V11 = 135
|
|
let UC_CPU_PPC_MPC8560_V10 = 136
|
|
let UC_CPU_PPC_MPC8560_V20 = 137
|
|
let UC_CPU_PPC_MPC8560_V21 = 138
|
|
let UC_CPU_PPC_MPC8567 = 139
|
|
let UC_CPU_PPC_MPC8567E = 140
|
|
let UC_CPU_PPC_MPC8568 = 141
|
|
let UC_CPU_PPC_MPC8568E = 142
|
|
let UC_CPU_PPC_MPC8572 = 143
|
|
let UC_CPU_PPC_MPC8572E = 144
|
|
let UC_CPU_PPC_E600 = 145
|
|
let UC_CPU_PPC_MPC8610 = 146
|
|
let UC_CPU_PPC_MPC8641 = 147
|
|
let UC_CPU_PPC_MPC8641D = 148
|
|
let UC_CPU_PPC_601_V0 = 149
|
|
let UC_CPU_PPC_601_V1 = 150
|
|
let UC_CPU_PPC_601_V2 = 151
|
|
let UC_CPU_PPC_602 = 152
|
|
let UC_CPU_PPC_603 = 153
|
|
let UC_CPU_PPC_603E_V1_1 = 154
|
|
let UC_CPU_PPC_603E_V1_2 = 155
|
|
let UC_CPU_PPC_603E_V1_3 = 156
|
|
let UC_CPU_PPC_603E_V1_4 = 157
|
|
let UC_CPU_PPC_603E_V2_2 = 158
|
|
let UC_CPU_PPC_603E_V3 = 159
|
|
let UC_CPU_PPC_603E_V4 = 160
|
|
let UC_CPU_PPC_603E_V4_1 = 161
|
|
let UC_CPU_PPC_603E7 = 162
|
|
let UC_CPU_PPC_603E7T = 163
|
|
let UC_CPU_PPC_603E7V = 164
|
|
let UC_CPU_PPC_603E7V1 = 165
|
|
let UC_CPU_PPC_603E7V2 = 166
|
|
let UC_CPU_PPC_603P = 167
|
|
let UC_CPU_PPC_604 = 168
|
|
let UC_CPU_PPC_604E_V1_0 = 169
|
|
let UC_CPU_PPC_604E_V2_2 = 170
|
|
let UC_CPU_PPC_604E_V2_4 = 171
|
|
let UC_CPU_PPC_604R = 172
|
|
let UC_CPU_PPC_740_V1_0 = 173
|
|
let UC_CPU_PPC_750_V1_0 = 174
|
|
let UC_CPU_PPC_740_V2_0 = 175
|
|
let UC_CPU_PPC_750_V2_0 = 176
|
|
let UC_CPU_PPC_740_V2_1 = 177
|
|
let UC_CPU_PPC_750_V2_1 = 178
|
|
let UC_CPU_PPC_740_V2_2 = 179
|
|
let UC_CPU_PPC_750_V2_2 = 180
|
|
let UC_CPU_PPC_740_V3_0 = 181
|
|
let UC_CPU_PPC_750_V3_0 = 182
|
|
let UC_CPU_PPC_740_V3_1 = 183
|
|
let UC_CPU_PPC_750_V3_1 = 184
|
|
let UC_CPU_PPC_740E = 185
|
|
let UC_CPU_PPC_750E = 186
|
|
let UC_CPU_PPC_740P = 187
|
|
let UC_CPU_PPC_750P = 188
|
|
let UC_CPU_PPC_750CL_V1_0 = 189
|
|
let UC_CPU_PPC_750CL_V2_0 = 190
|
|
let UC_CPU_PPC_750CX_V1_0 = 191
|
|
let UC_CPU_PPC_750CX_V2_0 = 192
|
|
let UC_CPU_PPC_750CX_V2_1 = 193
|
|
let UC_CPU_PPC_750CX_V2_2 = 194
|
|
let UC_CPU_PPC_750CXE_V2_1 = 195
|
|
let UC_CPU_PPC_750CXE_V2_2 = 196
|
|
let UC_CPU_PPC_750CXE_V2_3 = 197
|
|
let UC_CPU_PPC_750CXE_V2_4 = 198
|
|
let UC_CPU_PPC_750CXE_V2_4B = 199
|
|
let UC_CPU_PPC_750CXE_V3_0 = 200
|
|
let UC_CPU_PPC_750CXE_V3_1 = 201
|
|
let UC_CPU_PPC_750CXE_V3_1B = 202
|
|
let UC_CPU_PPC_750CXR = 203
|
|
let UC_CPU_PPC_750FL = 204
|
|
let UC_CPU_PPC_750FX_V1_0 = 205
|
|
let UC_CPU_PPC_750FX_V2_0 = 206
|
|
let UC_CPU_PPC_750FX_V2_1 = 207
|
|
let UC_CPU_PPC_750FX_V2_2 = 208
|
|
let UC_CPU_PPC_750FX_V2_3 = 209
|
|
let UC_CPU_PPC_750GL = 210
|
|
let UC_CPU_PPC_750GX_V1_0 = 211
|
|
let UC_CPU_PPC_750GX_V1_1 = 212
|
|
let UC_CPU_PPC_750GX_V1_2 = 213
|
|
let UC_CPU_PPC_750L_V2_0 = 214
|
|
let UC_CPU_PPC_750L_V2_1 = 215
|
|
let UC_CPU_PPC_750L_V2_2 = 216
|
|
let UC_CPU_PPC_750L_V3_0 = 217
|
|
let UC_CPU_PPC_750L_V3_2 = 218
|
|
let UC_CPU_PPC_745_V1_0 = 219
|
|
let UC_CPU_PPC_755_V1_0 = 220
|
|
let UC_CPU_PPC_745_V1_1 = 221
|
|
let UC_CPU_PPC_755_V1_1 = 222
|
|
let UC_CPU_PPC_745_V2_0 = 223
|
|
let UC_CPU_PPC_755_V2_0 = 224
|
|
let UC_CPU_PPC_745_V2_1 = 225
|
|
let UC_CPU_PPC_755_V2_1 = 226
|
|
let UC_CPU_PPC_745_V2_2 = 227
|
|
let UC_CPU_PPC_755_V2_2 = 228
|
|
let UC_CPU_PPC_745_V2_3 = 229
|
|
let UC_CPU_PPC_755_V2_3 = 230
|
|
let UC_CPU_PPC_745_V2_4 = 231
|
|
let UC_CPU_PPC_755_V2_4 = 232
|
|
let UC_CPU_PPC_745_V2_5 = 233
|
|
let UC_CPU_PPC_755_V2_5 = 234
|
|
let UC_CPU_PPC_745_V2_6 = 235
|
|
let UC_CPU_PPC_755_V2_6 = 236
|
|
let UC_CPU_PPC_745_V2_7 = 237
|
|
let UC_CPU_PPC_755_V2_7 = 238
|
|
let UC_CPU_PPC_745_V2_8 = 239
|
|
let UC_CPU_PPC_755_V2_8 = 240
|
|
let UC_CPU_PPC_7400_V1_0 = 241
|
|
let UC_CPU_PPC_7400_V1_1 = 242
|
|
let UC_CPU_PPC_7400_V2_0 = 243
|
|
let UC_CPU_PPC_7400_V2_1 = 244
|
|
let UC_CPU_PPC_7400_V2_2 = 245
|
|
let UC_CPU_PPC_7400_V2_6 = 246
|
|
let UC_CPU_PPC_7400_V2_7 = 247
|
|
let UC_CPU_PPC_7400_V2_8 = 248
|
|
let UC_CPU_PPC_7400_V2_9 = 249
|
|
let UC_CPU_PPC_7410_V1_0 = 250
|
|
let UC_CPU_PPC_7410_V1_1 = 251
|
|
let UC_CPU_PPC_7410_V1_2 = 252
|
|
let UC_CPU_PPC_7410_V1_3 = 253
|
|
let UC_CPU_PPC_7410_V1_4 = 254
|
|
let UC_CPU_PPC_7448_V1_0 = 255
|
|
let UC_CPU_PPC_7448_V1_1 = 256
|
|
let UC_CPU_PPC_7448_V2_0 = 257
|
|
let UC_CPU_PPC_7448_V2_1 = 258
|
|
let UC_CPU_PPC_7450_V1_0 = 259
|
|
let UC_CPU_PPC_7450_V1_1 = 260
|
|
let UC_CPU_PPC_7450_V1_2 = 261
|
|
let UC_CPU_PPC_7450_V2_0 = 262
|
|
let UC_CPU_PPC_7450_V2_1 = 263
|
|
let UC_CPU_PPC_7441_V2_1 = 264
|
|
let UC_CPU_PPC_7441_V2_3 = 265
|
|
let UC_CPU_PPC_7451_V2_3 = 266
|
|
let UC_CPU_PPC_7441_V2_10 = 267
|
|
let UC_CPU_PPC_7451_V2_10 = 268
|
|
let UC_CPU_PPC_7445_V1_0 = 269
|
|
let UC_CPU_PPC_7455_V1_0 = 270
|
|
let UC_CPU_PPC_7445_V2_1 = 271
|
|
let UC_CPU_PPC_7455_V2_1 = 272
|
|
let UC_CPU_PPC_7445_V3_2 = 273
|
|
let UC_CPU_PPC_7455_V3_2 = 274
|
|
let UC_CPU_PPC_7445_V3_3 = 275
|
|
let UC_CPU_PPC_7455_V3_3 = 276
|
|
let UC_CPU_PPC_7445_V3_4 = 277
|
|
let UC_CPU_PPC_7455_V3_4 = 278
|
|
let UC_CPU_PPC_7447_V1_0 = 279
|
|
let UC_CPU_PPC_7457_V1_0 = 280
|
|
let UC_CPU_PPC_7447_V1_1 = 281
|
|
let UC_CPU_PPC_7457_V1_1 = 282
|
|
let UC_CPU_PPC_7457_V1_2 = 283
|
|
let UC_CPU_PPC_7447A_V1_0 = 284
|
|
let UC_CPU_PPC_7457A_V1_0 = 285
|
|
let UC_CPU_PPC_7447A_V1_1 = 286
|
|
let UC_CPU_PPC_7457A_V1_1 = 287
|
|
let UC_CPU_PPC_7447A_V1_2 = 288
|
|
let UC_CPU_PPC_7457A_V1_2 = 289
|
|
|
|
let UC_CPU_PPC_E5500 = 0
|
|
let UC_CPU_PPC_E6500 = 1
|
|
let UC_CPU_PPC_970_V2_2 = 2
|
|
let UC_CPU_PPC_970FX_V1_0 = 3
|
|
let UC_CPU_PPC_970FX_V2_0 = 4
|
|
let UC_CPU_PPC_970FX_V2_1 = 5
|
|
let UC_CPU_PPC_970FX_V3_0 = 6
|
|
let UC_CPU_PPC_970FX_V3_1 = 7
|
|
let UC_CPU_PPC_970MP_V1_0 = 8
|
|
let UC_CPU_PPC_970MP_V1_1 = 9
|
|
let UC_CPU_PPC_POWER5_V2_1 = 10
|
|
let UC_CPU_PPC_POWER7_V2_3 = 11
|
|
let UC_CPU_PPC_POWER7_V2_1 = 12
|
|
let UC_CPU_PPC_POWER8E_V2_1 = 13
|
|
let UC_CPU_PPC_POWER8_V2_0 = 14
|
|
let UC_CPU_PPC_POWER8NVL_V1_0 = 15
|
|
let UC_CPU_PPC_POWER9_V1_0 = 16
|
|
let UC_CPU_PPC_POWER9_V2_0 = 17
|
|
let UC_CPU_PPC_POWER10_V1_0 = 18
|
|
|
|
// PPC registers
|
|
|
|
let UC_PPC_REG_INVALID = 0
|
|
|
|
// General purpose registers
|
|
let UC_PPC_REG_PC = 1
|
|
let UC_PPC_REG_0 = 2
|
|
let UC_PPC_REG_1 = 3
|
|
let UC_PPC_REG_2 = 4
|
|
let UC_PPC_REG_3 = 5
|
|
let UC_PPC_REG_4 = 6
|
|
let UC_PPC_REG_5 = 7
|
|
let UC_PPC_REG_6 = 8
|
|
let UC_PPC_REG_7 = 9
|
|
let UC_PPC_REG_8 = 10
|
|
let UC_PPC_REG_9 = 11
|
|
let UC_PPC_REG_10 = 12
|
|
let UC_PPC_REG_11 = 13
|
|
let UC_PPC_REG_12 = 14
|
|
let UC_PPC_REG_13 = 15
|
|
let UC_PPC_REG_14 = 16
|
|
let UC_PPC_REG_15 = 17
|
|
let UC_PPC_REG_16 = 18
|
|
let UC_PPC_REG_17 = 19
|
|
let UC_PPC_REG_18 = 20
|
|
let UC_PPC_REG_19 = 21
|
|
let UC_PPC_REG_20 = 22
|
|
let UC_PPC_REG_21 = 23
|
|
let UC_PPC_REG_22 = 24
|
|
let UC_PPC_REG_23 = 25
|
|
let UC_PPC_REG_24 = 26
|
|
let UC_PPC_REG_25 = 27
|
|
let UC_PPC_REG_26 = 28
|
|
let UC_PPC_REG_27 = 29
|
|
let UC_PPC_REG_28 = 30
|
|
let UC_PPC_REG_29 = 31
|
|
let UC_PPC_REG_30 = 32
|
|
let UC_PPC_REG_31 = 33
|
|
|