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favicon-trap/bindings/rust/src/x86.rs
2021-11-08 19:34:53 +01:00

276 lines
4.3 KiB
Rust

// X86 registers
#[repr(C)]
#[derive(PartialEq, Debug, Clone, Copy)]
#[allow(clippy::upper_case_acronyms, non_camel_case_types)]
pub enum RegisterX86 {
INVALID = 0,
AH = 1,
AL = 2,
AX = 3,
BH = 4,
BL = 5,
BP = 6,
BPL = 7,
BX = 8,
CH = 9,
CL = 10,
CS = 11,
CX = 12,
DH = 13,
DI = 14,
DIL = 15,
DL = 16,
DS = 17,
DX = 18,
EAX = 19,
EBP = 20,
EBX = 21,
ECX = 22,
EDI = 23,
EDX = 24,
EFLAGS = 25,
EIP = 26,
ES = 27,
ESI = 28,
ESP = 29,
FPSW = 30,
FS = 31,
GS = 32,
IP = 33,
RAX = 34,
RBP = 35,
RBX = 36,
RCX = 37,
RDI = 38,
RDX = 39,
RIP = 40,
RSI = 41,
RSP = 42,
SI = 43,
SIL = 44,
SP = 45,
SPL = 46,
SS = 47,
CR0 = 48,
CR1 = 49,
CR2 = 50,
CR3 = 51,
CR4 = 52,
CR8 = 53,
DR0 = 54,
DR1 = 55,
DR2 = 56,
DR3 = 57,
DR4 = 58,
DR5 = 59,
DR6 = 60,
DR7 = 61,
FP0 = 62,
FP1 = 63,
FP2 = 64,
FP3 = 65,
FP4 = 66,
FP5 = 67,
FP6 = 68,
FP7 = 69,
K0 = 70,
K1 = 71,
K2 = 72,
K3 = 73,
K4 = 74,
K5 = 75,
K6 = 76,
K7 = 77,
MM0 = 78,
MM1 = 79,
MM2 = 80,
MM3 = 81,
MM4 = 82,
MM5 = 83,
MM6 = 84,
MM7 = 85,
R8 = 86,
R9 = 87,
R10 = 88,
R11 = 89,
R12 = 90,
R13 = 91,
R14 = 92,
R15 = 93,
ST0 = 94,
ST1 = 95,
ST2 = 96,
ST3 = 97,
ST4 = 98,
ST5 = 99,
ST6 = 100,
ST7 = 101,
XMM0 = 102,
XMM1 = 103,
XMM2 = 104,
XMM3 = 105,
XMM4 = 106,
XMM5 = 107,
XMM6 = 108,
XMM7 = 109,
XMM8 = 110,
XMM9 = 111,
XMM10 = 112,
XMM11 = 113,
XMM12 = 114,
XMM13 = 115,
XMM14 = 116,
XMM15 = 117,
XMM16 = 118,
XMM17 = 119,
XMM18 = 120,
XMM19 = 121,
XMM20 = 122,
XMM21 = 123,
XMM22 = 124,
XMM23 = 125,
XMM24 = 126,
XMM25 = 127,
XMM26 = 128,
XMM27 = 129,
XMM28 = 130,
XMM29 = 131,
XMM30 = 132,
XMM31 = 133,
YMM0 = 134,
YMM1 = 135,
YMM2 = 136,
YMM3 = 137,
YMM4 = 138,
YMM5 = 139,
YMM6 = 140,
YMM7 = 141,
YMM8 = 142,
YMM9 = 143,
YMM10 = 144,
YMM11 = 145,
YMM12 = 146,
YMM13 = 147,
YMM14 = 148,
YMM15 = 149,
YMM16 = 150,
YMM17 = 151,
YMM18 = 152,
YMM19 = 153,
YMM20 = 154,
YMM21 = 155,
YMM22 = 156,
YMM23 = 157,
YMM24 = 158,
YMM25 = 159,
YMM26 = 160,
YMM27 = 161,
YMM28 = 162,
YMM29 = 163,
YMM30 = 164,
YMM31 = 165,
ZMM0 = 166,
ZMM1 = 167,
ZMM2 = 168,
ZMM3 = 169,
ZMM4 = 170,
ZMM5 = 171,
ZMM6 = 172,
ZMM7 = 173,
ZMM8 = 174,
ZMM9 = 175,
ZMM10 = 176,
ZMM11 = 177,
ZMM12 = 178,
ZMM13 = 179,
ZMM14 = 180,
ZMM15 = 181,
ZMM16 = 182,
ZMM17 = 183,
ZMM18 = 184,
ZMM19 = 185,
ZMM20 = 186,
ZMM21 = 187,
ZMM22 = 188,
ZMM23 = 189,
ZMM24 = 190,
ZMM25 = 191,
ZMM26 = 192,
ZMM27 = 193,
ZMM28 = 194,
ZMM29 = 195,
ZMM30 = 196,
ZMM31 = 197,
R8B = 198,
R9B = 199,
R10B = 200,
R11B = 201,
R12B = 202,
R13B = 203,
R14B = 204,
R15B = 205,
R8D = 206,
R9D = 207,
R10D = 208,
R11D = 209,
R12D = 210,
R13D = 211,
R14D = 212,
R15D = 213,
R8W = 214,
R9W = 215,
R10W = 216,
R11W = 217,
R12W = 218,
R13W = 219,
R14W = 220,
R15W = 221,
IDTR = 222,
GDTR = 223,
LDTR = 224,
TR = 225,
FPCW = 226,
FPTAG = 227,
MSR = 228,
MXCSR = 229,
FS_BASE = 230,
GS_BASE = 231,
FLAGS = 232,
RFLAGS = 233,
ENDING = 234,
}
impl From<RegisterX86> for i32 {
fn from(r: RegisterX86) -> Self {
r as i32
}
}
#[repr(C)]
#[derive(PartialEq, Debug, Clone, Copy)]
#[allow(clippy::upper_case_acronyms)]
pub enum InsnX86 {
IN = 218,
OUT = 500,
SYSCALL = 699,
SYSENTER = 700,
RET = 151,
}
#[repr(C)]
#[derive(PartialEq, Debug, Clone, Copy)]
#[allow(clippy::upper_case_acronyms)]
pub enum InsnSysX86 {
SYSCALL = InsnX86::SYSCALL as isize,
SYSENTER = InsnX86::SYSENTER as isize,
}
#[repr(C)]
#[derive(PartialEq, Debug, Clone, Copy)]
pub struct X86Mmr {
pub selector: u64,
pub base: u64,
pub limit: u32,
pub flags: u32,
}