uc_ctl proposal (#1473)

* Add uc_ctl

* Add comments

* Slightly changed for bindings generation

* Generate bindings

bindings/dotnet/UnicornManaged/Const/Arm.fs

@@ -7,6 +7,40 @@ open System
 [<AutoOpen>]
 module Arm =
 
+    let UC_CPU_ARM_926 = 0
+    let UC_CPU_ARM_946 = 1
+    let UC_CPU_ARM_1026 = 2
+    let UC_CPU_ARM_1136_R2 = 3
+    let UC_CPU_ARM_1136 = 4
+    let UC_CPU_ARM_1176 = 5
+    let UC_CPU_ARM_11MPCORE = 6
+    let UC_CPU_ARM_CORTEX_M0 = 7
+    let UC_CPU_ARM_CORTEX_M3 = 8
+    let UC_CPU_ARM_CORTEX_M4 = 9
+    let UC_CPU_ARM_CORTEX_M7 = 10
+    let UC_CPU_ARM_CORTEX_M33 = 11
+    let UC_CPU_ARM_CORTEX_R5 = 12
+    let UC_CPU_ARM_CORTEX_R5F = 13
+    let UC_CPU_ARM_CORTEX_A8 = 14
+    let UC_CPU_ARM_CORTEX_A9 = 15
+    let UC_CPU_ARM_CORTEX_A7 = 16
+    let UC_CPU_ARM_CORTEX_A15 = 17
+    let UC_CPU_ARM_TI925T = 18
+    let UC_CPU_ARM_SA1100 = 19
+    let UC_CPU_ARM_SA1110 = 20
+    let UC_CPU_ARM_PXA250 = 21
+    let UC_CPU_ARM_PXA255 = 22
+    let UC_CPU_ARM_PXA260 = 23
+    let UC_CPU_ARM_PXA261 = 24
+    let UC_CPU_ARM_PXA262 = 25
+    let UC_CPU_ARM_PXA270A0 = 26
+    let UC_CPU_ARM_PXA270A1 = 27
+    let UC_CPU_ARM_PXA270B0 = 28
+    let UC_CPU_ARM_PXA270B1 = 29
+    let UC_CPU_ARM_PXA270C0 = 30
+    let UC_CPU_ARM_PXA270C5 = 31
+    let UC_CPU_ARM_MAX = 32
+
     // ARM registers
 
     let UC_ARM_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Arm64.fs

@@ -7,6 +7,11 @@ open System
 [<AutoOpen>]
 module Arm64 =
 
+    let UC_CPU_AARCH64_A57 = 0
+    let UC_CPU_AARCH64_A53 = 1
+    let UC_CPU_AARCH64_A72 = 2
+    let UC_CPU_AARCH64_MAX = 3
+
     // ARM64 registers
 
     let UC_ARM64_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Common.fs

@@ -112,6 +112,22 @@ module Common =
     let UC_QUERY_ARCH = 3
     let UC_QUERY_TIMEOUT = 4
 
+    let UC_CTL_IO_NONE = 0
+    let UC_CTL_IO_WRITE = 1
+    let UC_CTL_IO_READ = 2
+    let UC_CTL_IO_READ_WRITE = 3
+
+    let UC_CTL_UC_MODE = 0
+    let UC_CTL_UC_PAGE_SIZE = 1
+    let UC_CTL_UC_ARCH = 2
+    let UC_CTL_UC_TIMEOUT = 3
+    let UC_CTL_UC_EXITS_CNT = 4
+    let UC_CTL_UC_EXITS = 5
+    let UC_CTL_CPU_MODEL = 6
+    let UC_CTL_TB_EDGE = 7
+    let UC_CTL_TB_REQUEST_CACHE = 8
+    let UC_CTL_TB_REMOVE_CACHE = 9
+
     let UC_PROT_NONE = 0
     let UC_PROT_READ = 1
     let UC_PROT_WRITE = 2

bindings/dotnet/UnicornManaged/Const/M68k.fs

@@ -7,6 +7,16 @@ open System
 [<AutoOpen>]
 module M68k =
 
+    let UC_CPU_M5206_CPU = 0
+    let UC_CPU_M68000_CPU = 1
+    let UC_CPU_M68020_CPU = 2
+    let UC_CPU_M68030_CPU = 3
+    let UC_CPU_M68040_CPU = 4
+    let UC_CPU_M68060_CPU = 5
+    let UC_CPU_M5208_CPU = 6
+    let UC_CPU_CFV4E_CPU = 7
+    let UC_CPU_ANY_CPU = 8
+
     // M68K registers
 
     let UC_M68K_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Mips.fs

@@ -7,6 +7,36 @@ open System
 [<AutoOpen>]
 module Mips =
 
+    let UC_CPU_MIPS_4KC = 0
+    let UC_CPU_MIPS_4KM = 1
+    let UC_CPU_MIPS_4KECR1 = 2
+    let UC_CPU_MIPS_4KEMR1 = 3
+    let UC_CPU_MIPS_4KEC = 4
+    let UC_CPU_MIPS_4KEM = 5
+    let UC_CPU_MIPS_24KC = 6
+    let UC_CPU_MIPS_24KEC = 7
+    let UC_CPU_MIPS_24KF = 8
+    let UC_CPU_MIPS_34KF = 9
+    let UC_CPU_MIPS_74KF = 10
+    let UC_CPU_MIPS_M14K = 11
+    let UC_CPU_MIPS_M14KC = 12
+    let UC_CPU_MIPS_P5600 = 13
+    let UC_CPU_MIPS_MIPS32R6_GENERIC = 14
+    let UC_CPU_MIPS_I7200 = 15
+    let UC_CPU_MIPS_R4000 = 16
+    let UC_CPU_MIPS_VR5432 = 17
+    let UC_CPU_MIPS_5KC = 18
+    let UC_CPU_MIPS_5KF = 19
+    let UC_CPU_MIPS_20KC = 20
+    let UC_CPU_MIPS_MIPS64R2_GENERIC = 21
+    let UC_CPU_MIPS_5KEC = 22
+    let UC_CPU_MIPS_5KEF = 23
+    let UC_CPU_MIPS_I6400 = 24
+    let UC_CPU_MIPS_I6500 = 25
+    let UC_CPU_MIPS_LOONGSON_2E = 26
+    let UC_CPU_MIPS_LOONGSON_2F = 27
+    let UC_CPU_MIPS_MIPS64DSPR2 = 28
+
     // MIPS registers
 
     let UC_MIPS_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Ppc.fs

@@ -7,6 +7,307 @@ open System
 [<AutoOpen>]
 module Ppc =
 
+    let UC_CPU_PPC_401A1 = 0
+    let UC_CPU_PPC_401B2 = 1
+    let UC_CPU_PPC_401C2 = 2
+    let UC_CPU_PPC_401D2 = 3
+    let UC_CPU_PPC_401E2 = 4
+    let UC_CPU_PPC_401F2 = 5
+    let UC_CPU_PPC_401G2 = 6
+    let UC_CPU_PPC_COBRA = 7
+    let UC_CPU_PPC_403GA = 8
+    let UC_CPU_PPC_403GB = 9
+    let UC_CPU_PPC_403GC = 10
+    let UC_CPU_PPC_403GCX = 11
+    let UC_CPU_PPC_405D2 = 12
+    let UC_CPU_PPC_405D4 = 13
+    let UC_CPU_PPC_405CRA = 14
+    let UC_CPU_PPC_405CRB = 15
+    let UC_CPU_PPC_405CRC = 16
+    let UC_CPU_PPC_405EP = 17
+    let UC_CPU_PPC_405EZ = 18
+    let UC_CPU_PPC_405GPA = 19
+    let UC_CPU_PPC_405GPB = 20
+    let UC_CPU_PPC_405GPC = 21
+    let UC_CPU_PPC_405GPD = 22
+    let UC_CPU_PPC_405GPR = 23
+    let UC_CPU_PPC_405LP = 24
+    let UC_CPU_PPC_NPE405H = 25
+    let UC_CPU_PPC_NPE405H2 = 26
+    let UC_CPU_PPC_NPE405L = 27
+    let UC_CPU_PPC_NPE4GS3 = 28
+    let UC_CPU_PPC_STB03 = 29
+    let UC_CPU_PPC_STB04 = 30
+    let UC_CPU_PPC_STB25 = 31
+    let UC_CPU_PPC_X2VP4 = 32
+    let UC_CPU_PPC_440_XILINX = 33
+    let UC_CPU_PPC_440EPA = 34
+    let UC_CPU_PPC_440EPB = 35
+    let UC_CPU_PPC_440GPB = 36
+    let UC_CPU_PPC_440GPC = 37
+    let UC_CPU_PPC_440GRX = 38
+    let UC_CPU_PPC_440GXA = 39
+    let UC_CPU_PPC_440GXB = 40
+    let UC_CPU_PPC_440GXC = 41
+    let UC_CPU_PPC_440GXF = 42
+    let UC_CPU_PPC_440SP = 43
+    let UC_CPU_PPC_440SP2 = 44
+    let UC_CPU_PPC_440SPE = 45
+    let UC_CPU_PPC_460EXB = 46
+    let UC_CPU_PPC_MPC5XX = 47
+    let UC_CPU_PPC_MPC8XX = 48
+    let UC_CPU_PPC_G2 = 49
+    let UC_CPU_PPC_G2H4 = 50
+    let UC_CPU_PPC_G2GP = 51
+    let UC_CPU_PPC_G2LS = 52
+    let UC_CPU_PPC_MPC603 = 53
+    let UC_CPU_PPC_G2_HIP3 = 54
+    let UC_CPU_PPC_G2_HIP4 = 55
+    let UC_CPU_PPC_G2LE = 56
+    let UC_CPU_PPC_G2LEGP = 57
+    let UC_CPU_PPC_G2LELS = 58
+    let UC_CPU_PPC_G2LEGP1 = 59
+    let UC_CPU_PPC_G2LEGP3 = 60
+    let UC_CPU_PPC_E200Z5 = 61
+    let UC_CPU_PPC_E200Z6 = 62
+    let UC_CPU_PPC_E300C1 = 63
+    let UC_CPU_PPC_E300C2 = 64
+    let UC_CPU_PPC_E300C3 = 65
+    let UC_CPU_PPC_E300C4 = 66
+    let UC_CPU_PPC_E500V1_V10 = 67
+    let UC_CPU_PPC_E500V1_V20 = 68
+    let UC_CPU_PPC_E500V2_V10 = 69
+    let UC_CPU_PPC_E500V2_V11 = 70
+    let UC_CPU_PPC_E500V2_V20 = 71
+    let UC_CPU_PPC_E500V2_V21 = 72
+    let UC_CPU_PPC_E500V2_V22 = 73
+    let UC_CPU_PPC_E500V2_V30 = 74
+    let UC_CPU_PPC_E500MC = 75
+    let UC_CPU_PPC_E5500 = 76
+    let UC_CPU_PPC_E6500 = 77
+    let UC_CPU_PPC_E600 = 78
+    let UC_CPU_PPC_601_V0 = 79
+    let UC_CPU_PPC_601_V1 = 80
+    let UC_CPU_PPC_601_V2 = 81
+    let UC_CPU_PPC_602 = 82
+    let UC_CPU_PPC_603 = 83
+    let UC_CPU_PPC_603E_V11 = 84
+    let UC_CPU_PPC_603E_V12 = 85
+    let UC_CPU_PPC_603E_V13 = 86
+    let UC_CPU_PPC_603E_V14 = 87
+    let UC_CPU_PPC_603E_V22 = 88
+    let UC_CPU_PPC_603E_V3 = 89
+    let UC_CPU_PPC_603E_V4 = 90
+    let UC_CPU_PPC_603E_V41 = 91
+    let UC_CPU_PPC_603E7T = 92
+    let UC_CPU_PPC_603E7V = 93
+    let UC_CPU_PPC_603E7V1 = 94
+    let UC_CPU_PPC_603E7V2 = 95
+    let UC_CPU_PPC_603E7 = 96
+    let UC_CPU_PPC_603P = 97
+    let UC_CPU_PPC_604 = 98
+    let UC_CPU_PPC_604E_V10 = 99
+    let UC_CPU_PPC_604E_V22 = 100
+    let UC_CPU_PPC_604E_V24 = 101
+    let UC_CPU_PPC_604R = 102
+    let UC_CPU_PPC_7X0_V10 = 103
+    let UC_CPU_PPC_7X0_V20 = 104
+    let UC_CPU_PPC_7X0_V21 = 105
+    let UC_CPU_PPC_7X0_V22 = 106
+    let UC_CPU_PPC_7X0_V30 = 107
+    let UC_CPU_PPC_7X0_V31 = 108
+    let UC_CPU_PPC_740E = 109
+    let UC_CPU_PPC_750E = 110
+    let UC_CPU_PPC_7X0P = 111
+    let UC_CPU_PPC_750CL_V10 = 112
+    let UC_CPU_PPC_750CL_V20 = 113
+    let UC_CPU_PPC_750CX_V10 = 114
+    let UC_CPU_PPC_750CX_V20 = 115
+    let UC_CPU_PPC_750CX_V21 = 116
+    let UC_CPU_PPC_750CX_V22 = 117
+    let UC_CPU_PPC_750CXE_V21 = 118
+    let UC_CPU_PPC_750CXE_V22 = 119
+    let UC_CPU_PPC_750CXE_V23 = 120
+    let UC_CPU_PPC_750CXE_V24 = 121
+    let UC_CPU_PPC_750CXE_V24B = 122
+    let UC_CPU_PPC_750CXE_V30 = 123
+    let UC_CPU_PPC_750CXE_V31 = 124
+    let UC_CPU_PPC_750CXE_V31B = 125
+    let UC_CPU_PPC_750CXR = 126
+    let UC_CPU_PPC_750FL = 127
+    let UC_CPU_PPC_750FX_V10 = 128
+    let UC_CPU_PPC_750FX_V20 = 129
+    let UC_CPU_PPC_750FX_V21 = 130
+    let UC_CPU_PPC_750FX_V22 = 131
+    let UC_CPU_PPC_750FX_V23 = 132
+    let UC_CPU_PPC_750GL = 133
+    let UC_CPU_PPC_750GX_V10 = 134
+    let UC_CPU_PPC_750GX_V11 = 135
+    let UC_CPU_PPC_750GX_V12 = 136
+    let UC_CPU_PPC_750L_V20 = 137
+    let UC_CPU_PPC_750L_V21 = 138
+    let UC_CPU_PPC_750L_V22 = 139
+    let UC_CPU_PPC_750L_V30 = 140
+    let UC_CPU_PPC_750L_V32 = 141
+    let UC_CPU_PPC_7X5_V10 = 142
+    let UC_CPU_PPC_7X5_V11 = 143
+    let UC_CPU_PPC_7X5_V20 = 144
+    let UC_CPU_PPC_7X5_V21 = 145
+    let UC_CPU_PPC_7X5_V22 = 146
+    let UC_CPU_PPC_7X5_V23 = 147
+    let UC_CPU_PPC_7X5_V24 = 148
+    let UC_CPU_PPC_7X5_V25 = 149
+    let UC_CPU_PPC_7X5_V26 = 150
+    let UC_CPU_PPC_7X5_V27 = 151
+    let UC_CPU_PPC_7X5_V28 = 152
+    let UC_CPU_PPC_7400_V10 = 153
+    let UC_CPU_PPC_7400_V11 = 154
+    let UC_CPU_PPC_7400_V20 = 155
+    let UC_CPU_PPC_7400_V21 = 156
+    let UC_CPU_PPC_7400_V22 = 157
+    let UC_CPU_PPC_7400_V26 = 158
+    let UC_CPU_PPC_7400_V27 = 159
+    let UC_CPU_PPC_7400_V28 = 160
+    let UC_CPU_PPC_7400_V29 = 161
+    let UC_CPU_PPC_7410_V10 = 162
+    let UC_CPU_PPC_7410_V11 = 163
+    let UC_CPU_PPC_7410_V12 = 164
+    let UC_CPU_PPC_7410_V13 = 165
+    let UC_CPU_PPC_7410_V14 = 166
+    let UC_CPU_PPC_7448_V10 = 167
+    let UC_CPU_PPC_7448_V11 = 168
+    let UC_CPU_PPC_7448_V20 = 169
+    let UC_CPU_PPC_7448_V21 = 170
+    let UC_CPU_PPC_7450_V10 = 171
+    let UC_CPU_PPC_7450_V11 = 172
+    let UC_CPU_PPC_7450_V12 = 173
+    let UC_CPU_PPC_7450_V20 = 174
+    let UC_CPU_PPC_7450_V21 = 175
+    let UC_CPU_PPC_74X1_V23 = 176
+    let UC_CPU_PPC_74X1_V210 = 177
+    let UC_CPU_PPC_74X5_V10 = 178
+    let UC_CPU_PPC_74X5_V21 = 179
+    let UC_CPU_PPC_74X5_V32 = 180
+    let UC_CPU_PPC_74X5_V33 = 181
+    let UC_CPU_PPC_74X5_V34 = 182
+    let UC_CPU_PPC_74X7_V10 = 183
+    let UC_CPU_PPC_74X7_V11 = 184
+    let UC_CPU_PPC_74X7_V12 = 185
+    let UC_CPU_PPC_74X7A_V10 = 186
+    let UC_CPU_PPC_74X7A_V11 = 187
+    let UC_CPU_PPC_74X7A_V12 = 188
+    let UC_CPU_PPC_IOP480 = 1
+    let UC_CPU_PPC_X2VP20 = 42
+    let UC_CPU_PPC_440GRA = 35
+    let UC_CPU_PPC_440EPX = 38
+    let UC_CPU_PPC_MPC5200_V10 = 59
+    let UC_CPU_PPC_MPC5200_V11 = 59
+    let UC_CPU_PPC_MPC5200_V12 = 59
+    let UC_CPU_PPC_MPC5200B_V20 = 59
+    let UC_CPU_PPC_MPC5200B_V21 = 59
+    let UC_CPU_PPC_MPC834X = 63
+    let UC_CPU_PPC_MPC837X = 66
+    let UC_CPU_PPC_E500 = 73
+    let UC_CPU_PPC_MPC8533_V10 = 72
+    let UC_CPU_PPC_MPC8533_V11 = 73
+    let UC_CPU_PPC_MPC8533E_V10 = 72
+    let UC_CPU_PPC_MPC8533E_V11 = 73
+    let UC_CPU_PPC_MPC8540_V10 = 67
+    let UC_CPU_PPC_MPC8540_V20 = 68
+    let UC_CPU_PPC_MPC8540_V21 = 68
+    let UC_CPU_PPC_MPC8541_V10 = 68
+    let UC_CPU_PPC_MPC8541_V11 = 68
+    let UC_CPU_PPC_MPC8541E_V10 = 68
+    let UC_CPU_PPC_MPC8541E_V11 = 68
+    let UC_CPU_PPC_MPC8543_V10 = 69
+    let UC_CPU_PPC_MPC8543_V11 = 70
+    let UC_CPU_PPC_MPC8543_V20 = 71
+    let UC_CPU_PPC_MPC8543_V21 = 72
+    let UC_CPU_PPC_MPC8543E_V10 = 69
+    let UC_CPU_PPC_MPC8543E_V11 = 70
+    let UC_CPU_PPC_MPC8543E_V20 = 71
+    let UC_CPU_PPC_MPC8543E_V21 = 72
+    let UC_CPU_PPC_MPC8544_V10 = 72
+    let UC_CPU_PPC_MPC8544_V11 = 73
+    let UC_CPU_PPC_MPC8544E_V11 = 73
+    let UC_CPU_PPC_MPC8544E_V10 = 72
+    let UC_CPU_PPC_MPC8545_V10 = 69
+    let UC_CPU_PPC_MPC8545_V20 = 71
+    let UC_CPU_PPC_MPC8545_V21 = 72
+    let UC_CPU_PPC_MPC8545E_V10 = 69
+    let UC_CPU_PPC_MPC8545E_V20 = 71
+    let UC_CPU_PPC_MPC8545E_V21 = 72
+    let UC_CPU_PPC_MPC8547E_V10 = 69
+    let UC_CPU_PPC_MPC8547E_V20 = 71
+    let UC_CPU_PPC_MPC8547E_V21 = 72
+    let UC_CPU_PPC_MPC8548_V10 = 69
+    let UC_CPU_PPC_MPC8548_V11 = 70
+    let UC_CPU_PPC_MPC8548_V20 = 71
+    let UC_CPU_PPC_MPC8548_V21 = 72
+    let UC_CPU_PPC_MPC8548E_V10 = 69
+    let UC_CPU_PPC_MPC8548E_V11 = 70
+    let UC_CPU_PPC_MPC8548E_V20 = 71
+    let UC_CPU_PPC_MPC8548E_V21 = 72
+    let UC_CPU_PPC_MPC8555_V10 = 69
+    let UC_CPU_PPC_MPC8555_V11 = 70
+    let UC_CPU_PPC_MPC8555E_V10 = 69
+    let UC_CPU_PPC_MPC8555E_V11 = 70
+    let UC_CPU_PPC_MPC8560_V10 = 69
+    let UC_CPU_PPC_MPC8560_V20 = 71
+    let UC_CPU_PPC_MPC8560_V21 = 72
+    let UC_CPU_PPC_MPC8567 = 73
+    let UC_CPU_PPC_MPC8567E = 73
+    let UC_CPU_PPC_MPC8568 = 73
+    let UC_CPU_PPC_MPC8568E = 73
+    let UC_CPU_PPC_MPC8572 = 74
+    let UC_CPU_PPC_MPC8572E = 74
+    let UC_CPU_PPC_MPC8610 = 78
+    let UC_CPU_PPC_MPC8641 = 78
+    let UC_CPU_PPC_MPC8641D = 78
+
+    let UC_CPU_PPC64_620 = 0
+    let UC_CPU_PPC64_630 = 1
+    let UC_CPU_PPC64_631 = 2
+    let UC_CPU_PPC64_POWER4 = 3
+    let UC_CPU_PPC64_POWER4P = 4
+    let UC_CPU_PPC64_POWER5 = 5
+    let UC_CPU_PPC64_POWER5P_V21 = 6
+    let UC_CPU_PPC64_POWER6 = 7
+    let UC_CPU_PPC64_POWER_SERVER_MASK = 8
+    let UC_CPU_PPC64_POWER7_BASE = 9
+    let UC_CPU_PPC64_POWER7_V23 = 10
+    let UC_CPU_PPC64_POWER7P_BASE = 11
+    let UC_CPU_PPC64_POWER7P_V21 = 12
+    let UC_CPU_PPC64_POWER8E_BASE = 13
+    let UC_CPU_PPC64_POWER8E_V21 = 14
+    let UC_CPU_PPC64_POWER8_BASE = 15
+    let UC_CPU_PPC64_POWER8_V20 = 16
+    let UC_CPU_PPC64_POWER8NVL_BASE = 17
+    let UC_CPU_PPC64_POWER8NVL_V10 = 18
+    let UC_CPU_PPC64_POWER9_BASE = 19
+    let UC_CPU_PPC64_POWER9_DD1 = 20
+    let UC_CPU_PPC64_POWER9_DD20 = 21
+    let UC_CPU_PPC64_POWER10_BASE = 22
+    let UC_CPU_PPC64_POWER10_DD1 = 23
+    let UC_CPU_PPC64_970_V22 = 24
+    let UC_CPU_PPC64_970FX_V10 = 25
+    let UC_CPU_PPC64_970FX_V20 = 26
+    let UC_CPU_PPC64_970FX_V21 = 27
+    let UC_CPU_PPC64_970FX_V30 = 28
+    let UC_CPU_PPC64_970FX_V31 = 29
+    let UC_CPU_PPC64_970MP_V10 = 30
+    let UC_CPU_PPC64_970MP_V11 = 31
+    let UC_CPU_PPC64_CELL_V10 = 32
+    let UC_CPU_PPC64_CELL_V20 = 33
+    let UC_CPU_PPC64_CELL_V30 = 34
+    let UC_CPU_PPC64_CELL_V31 = 35
+    let UC_CPU_PPC64_RS64 = 36
+    let UC_CPU_PPC64_RS64II = 37
+    let UC_CPU_PPC64_RS64III = 38
+    let UC_CPU_PPC64_RS64IV = 39
+    let UC_CPU_PPC64_CELL_V32 = 35
+    let UC_CPU_PPC64_CELL = 35
+
     // PPC registers
 
     let UC_PPC_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Riscv.fs

@@ -7,6 +7,16 @@ open System
 [<AutoOpen>]
 module Riscv =
 
+    let UC_CPU_RISCV32_ANY = 0
+    let UC_CPU_RISCV32_BASE32 = 1
+    let UC_CPU_RISCV32_SIFIVE_E31 = 2
+    let UC_CPU_RISCV32_SIFIVE_U34 = 3
+
+    let UC_CPU_RISCV64_ANY = 0
+    let UC_CPU_RISCV64_BASE64 = 1
+    let UC_CPU_RISCV64_SIFIVE_E51 = 2
+    let UC_CPU_RISCV64_SIFIVE_U54 = 3
+
     // RISCV registers
 
     let UC_RISCV_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/Sparc.fs

@@ -7,6 +7,38 @@ open System
 [<AutoOpen>]
 module Sparc =
 
+    let UC_CPU_SPARC_FUJITSU_MB86904 = 0
+    let UC_CPU_SPARC_FUJITSU_MB86907 = 1
+    let UC_CPU_SPARC_TI_MICROSPARC_I = 2
+    let UC_CPU_SPARC_TI_MICROSPARC_II = 3
+    let UC_CPU_SPARC_TI_MICROSPARC_IIEP = 4
+    let UC_CPU_SPARC_TI_SUPERSPARC_40 = 5
+    let UC_CPU_SPARC_TI_SUPERSPARC_50 = 6
+    let UC_CPU_SPARC_TI_SUPERSPARC_51 = 7
+    let UC_CPU_SPARC_TI_SUPERSPARC_60 = 8
+    let UC_CPU_SPARC_TI_SUPERSPARC_61 = 9
+    let UC_CPU_SPARC_TI_SUPERSPARC_II = 10
+    let UC_CPU_SPARC_LEON2 = 11
+    let UC_CPU_SPARC_LEON3 = 12
+
+    let UC_CPU_SPARC64_FUJITSU = 0
+    let UC_CPU_SPARC64_FUJITSU_III = 1
+    let UC_CPU_SPARC64_FUJITSU_IV = 2
+    let UC_CPU_SPARC64_FUJITSU_V = 3
+    let UC_CPU_SPARC64_TI_ULTRASPARC_I = 4
+    let UC_CPU_SPARC64_TI_ULTRASPARC_II = 5
+    let UC_CPU_SPARC64_TI_ULTRASPARC_III = 6
+    let UC_CPU_SPARC64_TI_ULTRASPARC_IIE = 7
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_III = 8
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_III_CU = 9
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_IIII = 10
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_IV = 11
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_IV_PLUS = 12
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_IIII_PLUS = 13
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14
+    let UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15
+    let UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16
+
     // SPARC registers
 
     let UC_SPARC_REG_INVALID = 0

bindings/dotnet/UnicornManaged/Const/X86.fs

@@ -7,6 +7,45 @@ open System
 [<AutoOpen>]
 module X86 =
 
+    let UC_CPU_X86_QEMU64 = 0
+    let UC_CPU_X86_PHENOM = 1
+    let UC_CPU_X86_CORE2DUO = 2
+    let UC_CPU_X86_KVM64 = 3
+    let UC_CPU_X86_QEMU32 = 4
+    let UC_CPU_X86_KVM32 = 5
+    let UC_CPU_X86_COREDUO = 6
+    let UC_CPU_X86_486 = 7
+    let UC_CPU_X86_PENTIUM = 8
+    let UC_CPU_X86_PENTIUM2 = 9
+    let UC_CPU_X86_PENTIUM3 = 10
+    let UC_CPU_X86_ATHLON = 11
+    let UC_CPU_X86_N270 = 12
+    let UC_CPU_X86_CONROE = 13
+    let UC_CPU_X86_PENRYN = 14
+    let UC_CPU_X86_NEHALEM = 15
+    let UC_CPU_X86_WESTMERE = 16
+    let UC_CPU_X86_SANDYBRIDGE = 17
+    let UC_CPU_X86_IVYBRIDGE = 18
+    let UC_CPU_X86_HASWELL = 19
+    let UC_CPU_X86_BROADWELL = 20
+    let UC_CPU_X86_SKYLAKE_CLIENT = 21
+    let UC_CPU_X86_SKYLAKE_SERVER = 22
+    let UC_CPU_X86_CASCADELAKE_SERVER = 23
+    let UC_CPU_X86_COOPERLAKE = 24
+    let UC_CPU_X86_ICELAKE_CLIENT = 25
+    let UC_CPU_X86_ICELAKE_SERVER = 26
+    let UC_CPU_X86_DENVERTON = 27
+    let UC_CPU_X86_SNOWRIDGE = 28
+    let UC_CPU_X86_KNIGHTSMILL = 29
+    let UC_CPU_X86_OPTERON_G1 = 30
+    let UC_CPU_X86_OPTERON_G2 = 31
+    let UC_CPU_X86_OPTERON_G3 = 32
+    let UC_CPU_X86_OPTERON_G4 = 33
+    let UC_CPU_X86_OPTERON_G5 = 34
+    let UC_CPU_X86_EPYC = 35
+    let UC_CPU_X86_DHYANA = 36
+    let UC_CPU_X86_EPYC_ROME = 37
+
     // X86 registers
 
     let UC_X86_REG_INVALID = 0