Commit Graph

370 Commits

Author SHA1 Message Date
mio
2ad9f152f9 Set emulation_done to true if and only if we exit the outer uc_emu_start
Or we may lost uc_emu_stop wrongly
2022-01-19 21:58:46 +01:00
mio
ac510d13c7 Fix fuzzing and remove unused variable 2022-01-18 21:37:32 +01:00
ea9c7425b0 Fix the wrong PC when arm translation fectches unmapped memory
This behavior keeps the same with Unicorn1, though, different from arm doc
2022-01-16 16:42:38 +01:00
6ed2214399 Rebuilt hflags when swithing modes
Or we may get the wrong mode during translation
2022-01-14 19:37:48 +01:00
36afa1022c More PPC registers
Add FPR0-31, CR0-7, LR, CTR, MSR, XER, FPSCR for PPC

Add a test for ppc32 float point
2022-01-10 15:16:10 +01:00
e84a5c44e9 Add a test for arm mrc instruction (also for coproc) 2022-01-05 21:57:32 +01:00
8e70f3e524 Format code 2022-01-05 21:56:58 +01:00
b8817518ae Add a test for arm64 pac extension 2022-01-05 20:02:21 +01:00
3f64491fda Add further test for arm system mode transition 2022-01-05 19:38:02 +01:00
73149f3616 Fix test case 2022-01-04 20:54:52 +01:00
7dc858d03d Add a test for arm privilege escalation 2022-01-04 20:30:07 +01:00
cddc9cf2ed Fix arm post init 2021-12-25 00:16:51 +01:00
5b3a9e1024 Add test for arm v8 2021-12-24 23:45:57 +01:00
4f73d75ea8 Fix #1500 2021-12-23 21:46:27 +01:00
ef6f8a2427 Fix x86 CPUID 2021-12-22 23:39:41 +01:00
7bb0abb977 Format 2021-12-22 20:37:15 +01:00
7bb756249a Better design of cpuid instruction hook 2021-12-22 20:36:56 +01:00
033e79abac Added cache flush after code patching in unit tests for arm64 and riscv 2021-12-17 14:55:08 +01:00
549274f44c Code patching tests for riscv and arm64 2021-12-10 15:27:54 +01:00
8a0ca8715e Fix SR read/write and a test 2021-12-04 23:22:28 +01:00
221cde18df Write CPSR as it is initiated from instructions to allow regs switch 2021-11-24 17:10:51 +01:00
78e0ddbc4d Fix mmio unmap 2021-11-24 00:18:19 +01:00
4ed1c4cff9 Fix test name typo 2021-11-23 23:24:53 +01:00
3e2580ef9e Add test case for #1497 2021-11-23 22:47:20 +01:00
e11cc16e54 Implement high-resolution clock for mingw64 in test_ctl 2021-11-23 14:15:18 +01:00
ccfb66611f Move test to test_mem 2021-11-23 00:41:49 +01:00
b35dbb90b2 Add test case for #1495 2021-11-22 18:48:16 +01:00
907ec5095d Fix a stackoverflow in tests 2021-11-21 19:28:45 +01:00
fc467edbc6 Fix 32bit target getting wrong offset for mmio 2021-11-16 22:40:57 +01:00
247ffbe0e8 Support nested uc_emu_start calls 2021-11-16 21:07:03 +01:00
640251e1aa Leave out size parameter in callback 2021-11-09 00:21:34 +01:00
35017a614f Slightly change UC_CTL_TB_REMOVE_CACHE 2021-11-08 22:09:33 +01:00
e836b62e01 Minor fix for uc_ctl 2021-11-08 20:40:02 +01:00
2f61592ff9 Fix uc_mem_protect 2021-11-07 20:37:58 +01:00
c6fdbb3735 Add RISCV CSR registers 2021-11-07 20:36:04 +01:00
01d7e454b7 Fix typo 2021-11-04 20:59:07 +01:00
3aa2788586 Format 2021-11-04 18:39:52 +01:00
dfbffa44ec Support changing cpu model for ARM 2021-11-04 18:37:10 +01:00
3e4b4af7d3 Support change page size 2021-11-04 17:03:30 +01:00
67e2386da6 Add test and close #1477 2021-11-03 21:40:13 +01:00
1a82248292 Add test for #992 2021-11-03 21:17:57 +01:00
6b5529fcb7 Merge pull request #1458 from bet4it/patch
Port some patches from Unicorn1 to Unicorn2
2021-11-03 20:59:42 +01:00
9818840f4e Add tests for UC_HOOK_TCG_OPCODE 2021-11-03 20:56:45 +01:00
58edb2abe7 Format 2021-11-03 13:28:12 +01:00
09aa0f944f Merge QDucasse:riscv_extension_d
Fix and close #1469

Fix test for riscv float points

Fix the riscv cpu config we left out
2021-11-03 13:20:46 +01:00
eb75d459f0 Add a regression test for invalidating empty TB and have a better solution 2021-11-03 01:07:06 +01:00
aaf340d9e4 Merge branch 'dev' into patch 2021-11-02 18:36:22 +08:00
b7e82d460c Expose more TB related stuff 2021-11-01 22:11:43 +01:00
14e175394b Fix Win32 time function for test_ctl 2021-11-01 19:43:30 +01:00
9704618595 Fix test for Android due to clock() not working 2021-11-01 15:33:36 +01:00