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fix some oss-fuzz (#1213)

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* fix oss-fuzz 18138.

* fix oss-fuzz 20079.

* fix oss-fuzz 20209.

* fix oss-fuzz 20210.

* fix oss-fuzz 20262.

* rollback.

* rollback.

* fix oss-fuzz 20079.

* fix oss-fuzz 20179.

* fix oss-fuzz 20195.

* fix oss-fuzz 20206.

* fix oss-fuzz 20207.

* fix oss-fuzz 20265.

* fix oss-fuzz 20285.

* fix oss-fuzz 20868.
This commit is contained in:
Chen Huitao
2020-02-26 17:58:19 +08:00
committed by GitHub
parent c520307959
commit 65614075d2
2 changed files with 3 additions and 3 deletions
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2
qemu/include/qemu/bitops.h
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@ -242,7 +242,7 @@ static inline uint32_t rol32(uint32_t word, unsigned int shift)
*/ */
static inline uint32_t ror32(uint32_t word, unsigned int shift) static inline uint32_t ror32(uint32_t word, unsigned int shift)
{ {
return (word >> shift) | (word << (32 - shift)); return (word >> shift) | (word << ((32 - shift) & 0x1f));
} }
/** /**

4
qemu/target-mips/translate.c
View File

@ -3217,14 +3217,14 @@ static inline void gen_pcrel(DisasContext *ctx, int rs, int16_t imm)
switch (MASK_OPC_PCREL_TOP5BITS(ctx->opcode)) { switch (MASK_OPC_PCREL_TOP5BITS(ctx->opcode)) {
case OPC_AUIPC: case OPC_AUIPC:
if (rs != 0) { if (rs != 0) {
offset = imm << 16; offset = ((target_ulong)imm) << 16;
addr = addr_add(ctx, ctx->pc, offset); addr = addr_add(ctx, ctx->pc, offset);
tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr); tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr);
} }
break; break;
case OPC_ALUIPC: case OPC_ALUIPC:
if (rs != 0) { if (rs != 0) {
offset = imm << 16; offset = ((target_ulong)imm) << 16;
addr = ~0xFFFF & addr_add(ctx, ctx->pc, offset); addr = ~0xFFFF & addr_add(ctx, ctx->pc, offset);
tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr); tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rs], addr);
} }